QPP-036 Ver la hoja de datos (PDF) - Xemod -> Mprise
Número de pieza
componentes Descripción
Fabricante
QPP-036 Datasheet PDF : 3 Pages
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Performance at 28VDC & 25ºC (continued)
Parameter
Symbol Min
Group (Signal) Delay
Transmission Phase Flatness
τd
4.7
CDMA(1) ACPR at 40W Pout AVG
-46
CDMA(1) ACPR at 20W Pout AVG
-52
CDMA(1) Drain Efficiency at 40W Pout AVG
CDMA(1) Drain Efficiency at 20W Pout AVG
(1) CDMA test signal is single carrier IS-95
η
20
η
13
Nom
0.5
-48
-53
21
15
Max
4.9
1.0
Units
ns
degrees
dB
dB
%
%
Notes:
The "Preliminary" designation on this data sheet indicates this product has not yet entered the volume production stage.
The data supplied here is derived from engineering development and pilot production testing and may change.
This QuikPAC module requires an externally supplied gate voltage (VGS) on each gate lead (pins 1 and 5) to set the
operating point (quiescent current (IDQ)) of the power transistors. VGS may be safely set to any voltage in the range listed in
the table. This permits a wide range of quiescent current to be used. Since the operating characteristics of the module will
vary as IDQ changes, the proper bias setting will depend on the application. The data provided in the Performance section of
this data sheet was obtained with IDQ set to a value within the range listed (a nominal value ±10%). This particular value was
chosen to provide a gain, IMD performance, and efficiency that are suitable for many applications but may not be optimum
for a specific design requirement.
Gate voltage must be applied coincident with or after application of the drain voltage to prevent potentially destructive
oscillations. Bias voltages should never be applied to a module unless it is terminated on both input and output.
The VGS corresponding to a specific IDQ will vary from module to module and may vary between the two sides of a dual RF
module by as much as ±0.10 volts. This is due to the normal die-to-die variation in threshold voltage of LDMOS transistors.
Since the threshold voltage of an LDMOS transistor changes with temperature, it is usually necessary to use a VGS supply
that is compensated to maintain constant IDQ over temperature if operation over a wide temperature range is desired.
Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some
applications may require energy storage on the drain leads to accommodate time-varying waveforms.
The RF leads are internally protected against DC voltages up to 100V. Care should be taken to avoid video transients that
may damage the active devices.
Xemod QuikPAC Data
QPP-033
www.xemod.com
Rev. A (10-17-01) Page 2 of 2
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