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MDT2051

8-bit micro-controller

Micon Design Technology Corporation 

MDT2051

Instruction Code

Mnemonic

Operands

Function

Operating

Status

011001 trrrrrrr

INCR R, t

Increment register

R + 1→t

Z

011010 trrrrrrr

INCRSZ R, t Increment register, skip if zero R + 1→t

None

011011 trrrrrrr

ADDWR R, t Add W and register

W + R→t

C, HC, Z

011100 trrrrrrr

011101 trrrrrrr

SUBWR R, t Subtract W from register

DECR R, t Decrement register

R ﹣W→t or

(R+/W+1→t)

R ﹣1→t

C, HC, Z

Z

011110 trrrrrrr

DECRSZ R, t Decrement register, skip if zero R ﹣1→t

None

010010 trrrrrrr

ANDWR R, t AND W and register

R ∩ W→t

Z

110100 iiiiiiii

ANDWI i

AND W and immediate

i ∩ W→W

Z

010011 trrrrrrr

IORWR R, t Inclu. OR W and register

R ∪ W→t

Z

110101 iiiiiiii

IORWI i

Inclu. OR W and immediate

i ∪ W→W

Z

010100 trrrrrrr

XORWR R, t Exclu. OR W and register

R ⊕ W→t

Z

110110 iiiiiiii

XORWI i

Exclu. OR W and immediate

i ⊕ W→W

Z

011111 trrrrrrr

COMR R, t Complement register

/R→t

Z

010110 trrrrrrr

010101 trrrrrrr

010000 1xxxxxxx

RRR R, t

Rotate right register

RLR R, t

Rotate left register

CLRW

Clear working register

R(n) →R(n-1),

C

C→R(7), R(0)→C

R(n)→r(n+1),

C

C→R(0), R(7)→C

0→W

Z

010001 0rrrrrrr

CLRR R

Clear register

0→R

Z

0000bb brrrrrrr

BCR R, b Bit clear

0→R(b)

None

0010bb brrrrrrr

BSR R, b Bit set

1→R(b)

None

0001bb brrrrrrr

BTSC R, b Bit Test, skip if clear

Skip if R(b)=0

None

0011bb brrrrrrr

BTSS R, b Bit Test, skip if set

Skip if R(b)=1

None

100nnn nnnnnnnn

101nnn nnnnnnnn

LCALL n

LJUMP n

Long CALL subroutine

Long JUMP to address

n→PC,

PC+1→Stack

n→PC

None

None

110111 iiiiiiii

ADDWI i

Add immediate to W

W+i→W

C,HC,Z

110001 iiiiiiii

RTWI i

Return, place immediate to W

Stack→PC,i→W

None

111000 iiiiiiii

SUBWI i

Subtract W from immediate

i-W→W

C,HC,Z

010000 00001001

Note :

W

:

WT

:

TMODE :

CPIO

:

TF

:

PF

:

PC

:

OSC

:

RTFI

Reture from interrupt

Working register

Watchdog timer

TMODE mode register

Control I/O port register

Timer overflow flag

Power loss flag

Program Counter

Oscillator

b:

t:

0

1

R:

C:

HC :

Z:

Stack→PC,1→GIS

Bit position

Target

: Working register

: General register

General register address

Carry flag

Half carry

Zero flag

None

This specification are subject to be changed without notice. Any latest information please preview

http;//www.mdtic.com.tw

P. 9

2005/6 Ver. 1.9

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