FL6961MY Ver la hoja de datos (PDF) - ON Semiconductor

Número de pieza

componentes Descripción

Fabricante

FL6961MY

Single-Stage Flyback and Boundary Mode PFC Controller for Lighting

ON Semiconductor 

Marking Information

FL6961

TPM

Pin Configuration

F- Fairchild Logo

Z- Plant Code

X- Year Code

Y- Week Code

TT: Die Run Code

T: Package Type (M=SOP)

P: Z: Pb Free

Y: Green Compound

M: Manufacture Flow Code

Figure 4. Marking Information

Figure 5. Pin Configuration (Top View)

Pin Definitions

Pin #

1

2

3

4

5

6

7

8

Name

INV

COMP

MOT

CS

ZCD

GND

GATE

VCC

Description

Inverting Input of the Error Amplifier. INV is connected to the converter output via a resistive

divider. This pin is also used for over-voltage clamping and open-loop feedback protection.

Output of the Error Amplifier. To create a precise clamping protection, a compensation network

between this pin and GND is suggested.

Maximum On Time. A resistor from MOT to GND is used to determine the maximum on-time of

the external power MOSFET. The maximum output power of the converter is a function of the

maximum on-time.

Current Sense. Input to the over-current protection comparator. When the sensed voltage across

the sense resistor reaches the internal threshold (0.8V), the switch is turned off to activate cycle-

by-cycle current limiting.

Zero-Current Detection. This pin is connected to an auxiliary winding via a resistor to detect the

zero crossing of the switch current. When the zero crossing is detected, a new switching cycle is

started. If it is connected to GND, the device is disabled.

Ground. The power ground and signal ground. Placing a 0.1µF decoupling capacitor between

VCC and GND is recommended.

Driver Output. Totem-pole driver output to drive the external power MOSFET. The clamped gate

output voltage is 16.5V.

Power Supply. Driver and control circuit supply voltage.

© 2010 Fairchild Semiconductor Corporation

FL6961 • Rev. 1.0.2

3

www.fairchildsemi.com

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