MAX820(1998) Ver la hoja de datos (PDF) - Maxim Integrated
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MAX820 Datasheet PDF : 16 Pages
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Microprocessor and Non-Volatile
Memory Supervisory Circuits
______________________________________________________________Pin Description
PIN
NAME
FUNCTION
Active-Low Reset Output goes low whenever VCC falls below the reset threshold in internal thresh-
1
RESET
old programming mode, or RESET IN falls below 1.30V in external threshold programming mode.
RESET remains low for 200ms typ after the threshold is exceeded on power-up.
2
RESET
Reset is the inverse of RESET.
3
VCC
Input Supply Voltage
Reset-Input/Internal-Mode Select. Connect this input to GND to select internal threshold mode.
4
RESET IN/INT Select external programming mode by pulling this input 600mV or higher through an external volt-
age divider.
Low-Line Input/Reference Output connects directly to the low-line comparator in external program-
5
LLIN/REF OUT ming mode (RESET IN/INT ≥ 600mV). Connects directly to the internal 1.30V reference in internal
threshold mode (RESET IN/INT ≤60mV).
6
OVO
Overvoltage Comparator Output goes low when OVI is greater than 1.30V. This is an uncommitted
comparator and has no effect on any other internal circuitry.
7
OVI
Inverting Input to the Overvoltage Comparator. When OVI is greater than 1.30V, OVO goes low.
Connect OVI to GND or VCC when not used.
Set Watchdog-Timeout Input. Connect this input to VCC to select the default 1.6sec watchdog
8
SWT
timeout period. Connect a capacitor between this input and GND to select another watchdog-
timeout period. Watchdog timeout period = k x (capacitor value in nF)mV, where k = 27 for
VCC = 5V and k = 16.2 for VCC = 3V. If the watchdog function is unused, connect SWT to VCC.
9
MR
Manual-Reset Input. This input can be tied to an external momentary pushbutton switch, or to a
logic gate output. Internally pulled up to VCC.
10
LOW LINE
Low-Line Output. LOW LINE goes low 120mV above the reset threshold in internal threshold mode,
or when LLIN/REFOUT goes below 1.30V in external programming mode.
Watchdog Input. If WDI remains either high or low for longer than the watchdog timeout period,
11
WDI
WDPO pulses low and WDO goes low. WDO remains low until the next transition at WDI. Connect to
GND or VCC if unused.
12
GND
Ground
Chip-Enable Output. CE OUT goes low only when CE IN is low and reset is not asserted. If CE IN is
13
CE OUT
low when reset is asserted, CE OUT will stay low for 15µs or until CE IN goes high, whichever
occurs first.
14
CE IN
Chip-Enable Input—the input to the chip-enable transmission gate. Connect to GND or VCC if not
used.
15
WDO
Watchdog Output. WDO goes low if WDI remains either high or low longer than the watchdog time-
out period. WDO returns high on the next transition at WDI.
16
WDPO
Watchdog-Pulse Output. Upon the absence of a transition at WDI, WDPO will pulse low for a mini-
mum of 500µs. WDPO precedes WDO by typically 70ns.
_______________________________________________________________________________________ 7
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