MC33364DG Ver la hoja de datos (PDF) - ON Semiconductor
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MC33364DG Datasheet PDF : 16 Pages
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MC33364
The primary inductance value is given by:
ǒ Ǔǒ Ǔ Lp
+
ēmax Vin(min)
Ippk fmin
+
0.5(127 V)
(0.472 A)(70 kHz)
+
1.92
mH
The manufacturer recommends for that magnetic core a
maximum operating flux density of:
Bmax + 0.2 T
The cross−sectional area Ac of the EF20 core is:
Ac + 33.5 mm2
The operating flux density is given by:
Bmax
+
LpIppk
NpAc
From this equation the number of turns of the primary
winding can be derived:
np
+
LpIppk
BmaxAc
The AL factor is determined by:
ƪ ǒ Ǔ ƫ AL
+
Lp
n2p
+
LpǒBmaxAcǓ2
2
Lp Ippk
ǒ0.2 TǓǒ33.5 E−6 m2Ǔ2
+ ǒ.00192 HǓ(0.472 A)2 + 105 nH
From the manufacturer‘s catalogue recommendation the
core with an AL of 100 nH is selected. The desired number
of turns of the primary winding is:
ǒ Ǔ ƪ ƫ np +
Lp
AL
1ń2
+
1ń2
(0.00192 H)
(100 nH)
+ 139 turns
The number of turns needed by the 6.0 V secondary is
(assuming a Schottky rectifier is used):
ƪ ǒ Ǔƫ ns + ǒVs ) VfwdǓǒ1–ēmaxǓnp
ēmax Vin(min)
ǒ6.0 V ) 0.3 VǓǒ1 * 0.5Ǔ139
+
ƪ0.5ǒ127 VǓƫ
+ 7 turns
The auxiliary winding to power the control IC is 16 V and
its number of turns is given by:
ƪ ƫ naux + (Vaux ) Vfwd)(1 * ēmax)np
ēmax(Vin(min))
+
(16
V
) 0.9 V)(1 *
[0.5(127 V)]
0.5)139
+
19
turns
The approximate value of rectifier capacitance needed is:
C1
+
toff(Iin)
Vripple
+
(5
m
sec)(0.118
50 V
A)
+
11.8
mF
where the minimum ripple frequency is 2 times the 50 Hz
line frequency and toff, the discharge time of C1 during the
haversine cycle, is assumed to be half the cycle period.
Because we have a variable frequency system, all the
calculations for the value of the output filter capacitors will
be done at the lowest frequency, since the ripple voltage will
be greatest at this frequency. When selecting the output
capacitor select a capacitor with low ESR to minimize ripple
from the current ripple. The approximate equation for the
output capacitance value is given by:
C5
+
Iout
(fmin)(Vrip)
+
(70
2A
kHz)(0.1
V)
+
286
mF
Determining the value of the current sense resistor (R7),
one uses the peak current in the predesign consideration.
Since within the IC there is a limitation of the voltage for the
current sensing, which is set to 1.2 V, the design of the
current sense resistor is simply given by:
R7
+
Vcs
Ippk
+
1.2 V
0.472 A
+
2.54
W
[
2.2
W
The error amplifier function is provided by a TL431 on the
secondary, connected to the primary side via an optoisolator,
the MOC8102.
The voltage of the optoisolator collector node sets the
peak current flowing through the power switch during each
cycle. This pin will be connected to the feedback pin of the
MC33364, which will directly set the peak current.
Starting on the secondary side of the power supply, assign
the sense current through the voltage−sensing resistor
divider to be approximately 0.25 mA. One can immediately
calculate the value of the lower and upper resistor:
Rlower
+
R11
+
Vref
(TL431)
Idiv
+
2.5
0.25
V
mA
+
10
k
Rupper
+
R10
+
Vout
*
Vref(TL431)
Idiv
+
6.0 V * 2.5V
0.25 mA
+
14
k
The value of the resistor that would provide the bias
current through the optoisolator and the TL431 is set by the
minimum operating current requirements of the TL431.
This current is minimum 1.0 mA. Assign the maximum
current through the branch to be 5 mA. That makes the bias
resistor value equal to:
Rbias
+
RS
+
Vout
*
[Vref(TL431)
ILED
)
VLED]
+
6.0
V
* [2.5V )
5.0 mA
1.4V]
+
420
W
[
430
W
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