MC33364D2R2G(2010) Ver la hoja de datos (PDF) - ON Semiconductor

Número de pieza

componentes Descripción

Fabricante

MC33364D2R2G
(Rev.:2010)

Critical Conduction GreenLinet SMPS Controller

ON Semiconductor 

MC33364

The MOC8102 has a typical current transfer ratio (CTR)

of 100% with 25% tolerance. When the TL431 is full--on,

5 mA will be drawn from the transistor within the

MOC8102. The transistor should be in saturated state at that

time, so its collector resistor must be

Rcollector

=

Vref − Vsat

ILED

=

5.0 V − 0.3

5.0 mA

V

=

940

Ω

Since a resistor of 5.0 k is internally connected from the

reference voltage to the feedback pin of the MC33364, the

external resistor can have a higher value

Rext

=

R3

=

(Rint)(Rcollector)

(Rint) − (Rcollector)

=

(5.0 k)(940)

5.0 k − 940

= 1157 Ω ≈ 1200 Ω

This completes the design of the voltage feedback circuit.

In no load condition there is only a current flowing

through the optoisolator diode and the voltage sense divider

on the secondary side.

The load at that condition is given by:

Rnoload

=

Vout

(ILED + Idiv)

=

(5.0

6.0

mA +

V

0.25

mA)

=

1143

Ω

The output filter pole at no load is:

fph

=

(

2π

1

Rnoload

Cout

)

=

1

(2π)(1143)(300

mF)

=

0.46

Hz

In heavy load condition the ILED and Idiv is negligible. The

heavy load resistance is given by:

Rheavy

=

Vout

Iout

=

6.0

2.0

V

A

=

3.0

Ω

The output filter pole at heavy load of this output is

fph

=

(2π

1

RheavyCout)

=

1

(2π)(3)(300

mF)

=

177

Hz

The gain exhibited by the open loop power supply at the

high input voltage will be:

2

  Vin max − Vout

A=

Ns

=

382

(382

V − 6.0 V2(7)

V)(1.2 V)(139)

  (Vin max)(Verror)(Np)

= 15.53 = 23.82 dB

The maximum recommended bandwidth is

approximately:

fc

=

fs

min

5

=

70

kHz

5

=

14

kHz

The gain needed by the error amplifier to achieve this

bandwidth is calculated at the rated load because that yields

the bandwidth condition, which is:

    Gc = 20 log

fc

fph

− A = 20 log

14 kHz

177

− 23.82 dB

= 14.14 dB

The gain in absolute terms is:

Ac = 10(Gc∕20) = 10(14.14∕20) = 5.1

Now the compensation circuit elements can be calculated.

The output resistance of the voltage sense divider is given by

the parallel combination of resistors in the divider:

Rin = Rupper || Rlower = 10 k || 14 k = 5833 Ω

R9 = (Ac) (Rin) = 29.75 k ≈ 30 k

  C8 =

1

= 382 pF ≈ 390 pF

2π (Ac) (Rin) (fc)

The compensation zero must be placed at or below the

light load filter pole:

  C7 =

1

= 11.63 mF ≈ 10 mF

2π (R9) (fpn)

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