VN1504NW Ver la hoja de datos (PDF) - Supertex Inc
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VN1504NW Datasheet PDF : 5 Pages
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Supertex inc.
VN0104
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
►► Free from secondary breakdown
►► Low power drive requirement
►► Ease of paralleling
►► Low CISS and fast switching speeds
►► Excellent thermal stability
►► Integral source-drain diode
►► High input impedance and high gain
General Description
This enhancement-mode (normally-off) transistor utilizes a
vertical DMOS structure and Supertex’s well-proven, silicon-
gate manufacturing process. This combination produces a
device with the power handling capabilities of bipolar transistors
and the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all
MOS structures, this device is free from thermal runaway and
thermally-induced secondary breakdown.
Applications
►► Motor controls
►► Converters
►► Amplifiers
►► Switches
►► Power supply circuits
►► Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
Ordering Information
Device
Package Option
TO-92
NW
(Die in wafer form)
Wafer / Die Options
NJ
(Die on adhesive tape)
VN0104
VN0104N3-G
VN1504NW
VN1504NJ
For packaged products, -G indicates package is RoHS compliant (‘Green’). Devices in Wafer / Die form are RoHS compliant (‘Green’).
Refer to Die Specification VF15 for layout and dimensions.
ND
(Die in waffle pack)
VN1504ND
Product Summary
BVDSS/BVDGS
(V)
RDS(ON)
(max)
(Ω)
40
3.0
ID(ON)
(min)
(A)
2.0
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Pin Configuration
SOURCE
DRAIN
GATE
TO-92 (N3)
Product Marking
SiVN YY = Year Sealed
0 1 0 4 WW = Week Sealed
YYWW
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-92 (N3)
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
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