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LC78621E Ver la hoja de datos (PDF) - SANYO -> Panasonic

Número de pieza
componentes Descripción
Fabricante
LC78621E
SANYO
SANYO -> Panasonic SANYO
LC78621E Datasheet PDF : 34 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LC78621E
Pin Functions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Symbol
DEFI
TAI
PDO
VVSS
ISET
VVDD
FR
VSS
EFMO
EFMO
EFMIN
TEST2
CLV+
CLV
V/P
FOCS
FST
FZD
HFL
TES
PCK
FSEQ
TOFF
TGL
THLD
TEST3
VDD
JP+
29
JP
30
DEMO
31
TEST4
32
EMPH
33
LRCKO
34
DFORO
35
DFOLO
36
DACKO
37
TST10
38
ASDACK
39
ASDFIN
40
ASDFIR
41
ASLRCK
I/O
Function
I Defect detection signal (DEF) input (Must be tied low if unused.)
I
Test input. A pull-down resistor is built in.
O
External VCO control phase comparator output
PLL pins
AI
Internal VCO ground. Normally 0 V.
PDO output current adjustment resistor connection
Internal VCO power supply.
AI
VCO frequency range adjustment
Digital system ground. Normally 0 V.
O
EFM signal inverted output
O Slice level control
EFM signal output
I
EFM signal input
I Test input. A pull-down resistor is built in.
O Spindle servo control output. Acceleration when CLV+ is high, deceleration when CLVis high
O Three-value output is also possible when specified by microprocessor command.
Rough servo/phase control automatic switching monitor output. Outputs a high level during rough servo and a low level
O during phase control.
O Focus servo on/off output. Focus servo is on when the output is low.
O Focus start pulse output. This is an open-drain output.
I Focus error zero cross signal input. (Must be tied low if unused.)
I Track detection signal input. This is a Schmitt input.
I Tracking error signal input. This is a Schmitt input.
O EFM data playback clock monitor. Outputs 4.3218 MHz when the phase is locked.
Synchronization signal detection output. Outputs a high level when the synchronization signal detected from the EFM
O signal and the internally generated synchronization signal agree.
O Tracking off output
O Tracking gain switching output. Increase the gain when low.
O Tracking hold output
I Test input. A pull-down resistor is built in.
Digital system power supply.
O Track jump output. A high level output from JP+ indicates acceleration during an outward jump or deceleration during an
inward jump.
A high level output from JPindicates acceleration during an inward jump or deceleration during an outward jump.
O Three-value output is also possible when specified by microprocessor command.
I Sound output function input used for end product adjustment manufacturing steps. A pull-down resistor is built in.
I Test input. A pull-down resistor is built in.
O De-emphasis monitor pin. A high level indicates playback of a de-emphasis disk.
O
Word clock output
O
Digital filter outputs
O
Right channel data output
Left channel data output
O
Bit clock output
O Test output. Leave open. (Normally outputs a low level.)
I
Bit clock input
I Anti-shock system inputs Left/right channel data input
I (Must be tied low if unused.) Test input. (Should be tied low for normal operation.)
I
Word clock input
Continued on next page.
No. 5223-7/34

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