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LTC2753UK-12

Dual Current Output 12-/14-/16-Bit SoftSpan DACs with Parallel I/O

Linear Technology 

LTC2753

PIN FUNCTIONS

output the contents of the selected register (see Table

1). For single-span operation, readback of the span I/O

pins is disabled.

UPD (Pin 36): Update and Buffer Select Pin. When READ

is held low and UPD is asserted high, the contents of the

addressed DAC’s input registers (both data and span) are

copied into their respective DAC registers. The output of the

DAC is updated, reflecting the new DAC register values.

When READ is held high, the update function is disabled

and the UPD pin functions as a buffer selector—logic low

to select the input register, high to select the DAC register.

See Readback in the Operation section.

WR (Pin 37): Active Low Write Pin. A Write operation cop-

ies the data present on the data or span I/O pins (D0-D15

or S0-S2, respectively) into the associated input register.

When READ is high, the Write function is disabled.

S1 (Pin 38): Span I/O Bit 1. Pins S0, S1 and S2 are used

to program and to read back the output ranges of the

DACs.

REFB (Pin 39): Reference Input for DAC B. The impedance

looking into this pin is 10k to ground. For normal opera-

tion tie to the output of the reference inverting amplifier.

Typically –5V; accepts up to ±15V.

ROFSB (Pin 40): Bipolar Offset Network for DAC B. This

pin provides the translation of the output voltage range for

bipolar spans. Accepts up to ±15V; for normal operation

tie to the positive reference voltage at RIN (Pin 2). The

impedance looking into this pin is 20k to ground.

RFBB (Pin 41): DAC B Feedback Resistor. For normal

operation tie to the output of the I/V converter amplifier

for DAC B (see Typical Applications). The DAC output

current from IOUT1B flows through the feedback resistor

to the RFBB pin. The impedance looking into this pin is

10k to ground.

IOUT1B (Pin 42): DAC B Current Output. This pin is a virtual

ground when the DAC is operating and should reside at

0V. For normal operation tie to the negative input of the I/V

converter amplifier for DAC B (see Typical Applications).

RVOSB (Pin 43): DAC B Offset Adjust. Nominal input range

is ±5V. The impedance looking into this pin is 1M to ground.

If not used, tie RVOSB to ground.

RVOSA (Pin 44): DAC A Offset Adjust. Nominal input range

is ±5V. The impedance looking into this pin is 1M to ground.

If not used, tie RVOSA to ground.

IOUT1A (Pin 45): DAC A Current Output. This pin is a virtual

ground when the DAC is operating and should reside at

0V. For normal operation tie to the negative input of the I/V

converter amplifier for DAC A (see Typical Applications).

RFBA (Pin 46): DAC A Feedback Resistor. For normal

operation tie to the output of the I/V converter amplifier

for DAC A (see Typical Applications). The DAC output

current from IOUT1A flows through the feedback resistor

to the RFBA pin. The impedance looking into this pin is

10k to ground.

ROFSA (Pin 47): Bipolar Offset Network for DAC A. This

pin provides the translation of the output voltage range for

bipolar spans. Accepts up to ±15V; for normal operation

tie to the positive reference voltage at RIN (Pin 2). The

impedance looking into this pin is 20k to ground.

REFA (Pin 48): Reference Input for DAC A, and connec-

tion for internal reference inverting resistor R2. The 20k

resistor R2 is connected internally from RCOM to REFA. For

normal operation tie this pin to the output of the reference

inverting amplifier (see Typical Applications). Typically –5V;

accepts up to ±15V. The impedance looking into this pin

is 10k to ground (RIN and RCOM floating).

Exposed Pad (Pin 49): Ground. The Exposed Pad must

be soldered to the PCB.

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