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PE42650A Ver la hoja de datos (PDF) - Peregrine Semiconductor

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PE42650A Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Evaluation Kit
The PE42650A Evaluation Kit board was designed
to ease customer evaluation of the PE42650A RF
switch.
DC power is supplied through J10, with VDD on pin 9,
and GND on the entire lower row of even numbered
pins. To evaluate a switch path, add or remove
jumpers on V1 (pin 3), V2 (pin 5), and V3 (pin
7) using Table 5 (adding a jumper pulls the CMOS
control pin low and removing it allows the on-board
pull-up resistor to set the CMOS control pin
high). J10 pins 1, 11, and 13 are N/C.
The RF common port (ANT) is connected through
a 50 Ohm transmission line via the top SMA
connector, J1. RX and TX paths are also
connected through 50 Ohm transmission lines via
SMA connectors. A 50 Ohm through transmission
line is available via SMA connectors J8 and J9.
This transmission line can be used to estimate the
loss of the PCB over the environmental conditions
being evaluated. An open-ended 50 Ohm
transmission line is also provided at J7 for calibration
if needed.
Narrow trace widths are used near each part to
improve impedance matching.
PE42650A
Product Specification
Figure 4. Evaluation Board Layout
Peregrine Specification 101-0315
Figure 5. Evaluation Board Schematic
Peregrine Specification 102-0535
©2008-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 11
Document No. 70-0267-02 UltraCMOS™ RFIC Solutions

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