LTC1660 Ver la hoja de datos (PDF) - Linear Technology
Número de pieza
componentes Descripción
Fabricante
LTC1660 Datasheet PDF : 18 Pages
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LTC1665/LTC1660
OPERATION
SCK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DIN
CS/LD
(ENABLE CLK)
A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0
ADDRESS/CONTROL
INPUT CODE
INPUT WORD W0
DON’T CARE
(UPDATE OUTPUT)
DOUT
A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0 A3
INPUT WORD W–1
Figure 2a. LTC1665 Register Loading Sequence
INPUT WORD W0
166560 F02a
SCK
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DIN
CS/LD
(ENABLE CLK)
A3 A2 A1 A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X1 X0
ADDRESS/CONTROL
INPUT CODE
INPUT WORD W0
DON’T CARE
(UPDATE OUTPUT)
DOUT
A3 A2 A1 A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X1 X0 A3
INPUT WORD W–1
Figure 2b. LTC1660 Register Loading Sequence
INPUT WORD W0
166560 F02b
Table 1a. LTC1665 Input Word
A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 X3 X2 X1 X0
ADDRESS/CONTROL
INPUT CODE
DON’T CARE
Table 1b. LTC1660 Input Word
A3 A2 A1 A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X1 X0
ADDRESS/CONTROL
INPUT CODE
DON’T
CARE
Sleep Mode
DAC address 1110b is reserved for the special Sleep instruc-
tion (see Table 2). In this mode, the digital interface stays
active while the analog circuits are disabled; static power
consumption is thus virtually eliminated. The reference
input and analog outputs are set in a high impedance state
and all DAC settings are retained in memory so that when
Sleep mode is exited, the outputs of DACs not updated by
the Wake command are restored to their last active state.
10
166560fa
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