CY14B108N-ZSP25XCT Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY14B108N-ZSP25XCT Datasheet PDF : 24 Pages
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CY14B108L, CY14B108N
Table 2. Mode Selection
CE
WE
H
X
L
H
L
L
L
H
L
H
L
H
L
H
OE, BHE, BLE[3]
X
L
X
L
L
L
L
A15 - A0[5]
X
X
X
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x8B45
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x4B46
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x8FC0
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x4C63
Mode
I/O
Not Selected Output High Z
Read SRAM
Output Data
Write SRAM
Input Data
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore
Disable
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore Enable
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
STORE
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
RECALL
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Power
Standby
Active
Active
Active[6]
Active[6]
Active ICC2[6]
Active[6]
Notes
5. While there are 20 address lines on the CY14B108L (19 address lines on the CY14B108N), only the 13 address lines (A14 - A2) are used to control software modes.
Rest of the address lines are don’t care.
6. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle.
Document #: 001-45523 Rev. *D
Page 6 of 24
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