CY14B108N-ZSP25XCT Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY14B108N-ZSP25XCT Datasheet PDF : 24 Pages
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CY14B108L, CY14B108N
AC Switching Characteristics
Parameters
Cypress
Alt
Parameters Parameters
Description
SRAM Read Cycle
tACE
tRC[10]
tAA[11]
tACS
tRC
tAA
tDOE
tOHA[11]
tLZCE[9, 12]
tHZCE[9, 12]
tLZOE[9, 12]
tHZOE[9, 12]
tPU[9]
tPD[9]
tOE
tOH
tLZ
tHZ
tOLZ
tOHZ
tPA
tPS
tDBE
-
tLZBE[9]
-
tHZBE[9]
-
SRAM Write Cycle
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold After Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
Byte Enable to Data Valid
Byte Enable to Output Active
Byte Disable to Output Inactive
tWC
tWC
tPWE
tWP
tSCE
tCW
tSD
tDW
tHD
tDH
tAW
tAW
tSA
tAS
tHA
tHZWE[9, 12,13]
tLZWE[9, 12]
tWR
tWZ
tOW
tBW
-
Write Cycle Time
Write Pulse Width
Chip Enable To End of Write
Data Setup to End of Write
Data Hold After End of Write
Address Setup to End of Write
Address Setup to Start of Write
Address Hold After End of Write
Write Enable to Output Disable
Output Active after End of Write
Byte Enable to End of Write
20 ns
Min Max
20
20
20
10
3
3
8
0
8
0
20
10
0
8
20
15
15
8
0
15
0
0
8
3
15
25 ns
Min Max
25
25
25
12
3
3
10
0
10
0
25
12
0
10
25
20
20
10
0
20
0
0
10
3
20
Switching Waveforms
Figure 5. SRAM Read Cycle #1: Address Controlled[10, 11, 14]
Address
tRC
Address Valid
tAA
45 ns
Unit
Min Max
45
ns
45
ns
45
ns
20
ns
3
ns
3
ns
15
ns
0
ns
15
ns
0
ns
45
ns
20
ns
0
ns
15
ns
45
ns
30
ns
30
ns
15
ns
0
ns
30
ns
0
ns
0
ns
15
ns
3
ns
30
ns
Data Output
Previous Data Valid
tOHA
Output Data Valid
Notes
10. WE must be HIGH during SRAM read cycles.
11. Device is continuously selected with CE, OE and BHE / BLE LOW.
12. Measured ±200 mV from steady state output voltage.
13. If WE is LOW when CE goes LOW, the outputs remain in the high impedance state.
14. HSB must remain HIGH during READ and WRITE cycles.
Document #: 001-45523 Rev. *D
Page 10 of 24
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