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EVAL-ADE7762EBZ Ver la hoja de datos (PDF) - Analog Devices

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EVAL-ADE7762EBZ Datasheet PDF : 28 Pages
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ADE7762
Pin No.
21
Mnemonic
CLKIN
22
23, 24
25, 26
27
28
CLKOUT
S0, S1
F2, F1
LED_C
LED_B
Description
Master Clock for the ADCs and Digital Signal Processing. An external clock can be provided at this logic
input. Alternatively, a parallel resonant AT crystal can be connected across CLKIN and CLKOUT to
provide a clock source for the ADE7762. The clock frequency for the specified operation is 10 MHz.
Ceramic load capacitors between 22 pF and 33 pF should be used with the gate oscillator circuit. Refer
to the crystal manufacturer’s data sheet for the load capacitance requirements.
A crystal can be connected across this pin and CLKIN as described for Pin 21 to provide a clock source
for the ADE7762. The CLKOUT pin can drive one CMOS load when an external clock is supplied at CLKIN
or when a crystal is used.
These logic inputs are used to select one of four possible frequencies for the digital-to-frequency
conversion for design flexibility.
Low Frequency Logic Outputs. F1 and F2 supply average active power information. These logic outputs
can be used to drive electromechanical counters and 2-phase stepper motors directly (see the Transfer
Function section).
Phase C Phase Monitor Output. LEDs are connected to this pin to indicate phase drop or reverse power
on Phase C (see the Phase Monitor section).
Phase B Phase Monitor Output. LEDs are connected to this pin to indicate phase drop or reverse power
on Phase B (see the Phase Monitor section).
Rev. 0 | Page 8 of 28

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