EVAL-ADE7762EBZ Ver la hoja de datos (PDF) - Analog Devices

Número de pieza

componentes Descripción

Fabricante

EVAL-ADE7762EBZ

Polyphase Energy Metering IC with Phase Drop Indication

Analog Devices 

ADE7762

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

LED_CTRL 1

28 LED_B

LED_A 2

27 LED_C

CF 3

26 F1

DGND 4

25 F2

VDD 5

24 S1

REVP 6 ADE7762 23 S0

IAP 7 TOP VIEW 22 CLKOUT

(Not to Scale)

IAN 8

21 CLKIN

IBP 9

20 SCF

IBN 10

19 ABS

ICP 11

18 VAP

ICN 12

17 VBP

AGND 13

16 VCP

REFIN/OUT 14

15 VN

Figure 4. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic

Description

1

2

3

4

5

6

7, 8;

9, 10;

11, 12

13

LED_CTRL

LED_A

CF

DGND

VDD

REVP

IAP, IAN;

IBP, IBN;

ICP, ICN

AGND

14

REFIN/OUT

15, 16, 17, VN, VCP, VBP, VAP

18

19

ABS

20

SCF

LED Control Output. The LED_CTRL signal multiplexes the indication of phase drop, phase sequence

error, and per phase reverse power on the LED_A, LED_B, and LED_C pins.

Phase A Phase Monitor Output. LEDs are connected to this pin to indicate phase drop or reverse power

on Phase A (see the Phase Monitor section).

Calibration Frequency Logic Output. The CF logic output gives instantaneous active power information.

This output is intended to be used for calibration purposes.

This provides the ground reference for the digital circuitry in the ADE7762, that is, multipliers, filters,

and digital-to-frequency converters. Because the digital return currents in the ADE7762 are small, it is

acceptable to connect this pin to the analog ground plane of the whole system.

Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7762. The supply

voltage should be maintained at 5 V ± 5% for a specified operation. This pin should be decoupled to

DGND with a 10 μF capacitor in parallel with a 100 nF ceramic capacitor.

This logic output goes logic high when negative power is detected on the sum of the three phase

powers. This output is not latched and resets when positive power is once again detected (see the

Negative Total Power Detection section).

Analog Inputs for Current Channels. These channels are intended for use with current transducers and

are referenced in this document as current channels. These inputs are fully differential voltage inputs

with maximum differential input signal levels of ±0.5 V (see the Analog Inputs section). Both inputs

have internal ESD protection circuitry; in addition, an overvoltage of ±6 V can be sustained on these

inputs without risk of permanent damage.

This pin provides the ground reference for the analog circuitry in the ADE7762 (ADCs and reference).

This pin should be tied to the analog ground plane or the quietest ground reference in the system. This

quiet ground reference should be used for all analog circuitry, such as antialiasing filters and current

and voltage transducers. To keep ground noise around the ADE7762 to a minimum, the quiet ground

plane should connect to the digital ground plane at only one point. It is acceptable to place the entire

device on the analog ground plane.

This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of

2.4 V ± 8% and a typical temperature coefficient of 25 ppm/°C. An external reference source can also be

connected at this pin. In either case, this pin should be decoupled to AGND with a 1 μF ceramic

capacitor.

Analog Inputs for the Voltage Channels. These channels are intended for use with voltage transducers

and are referenced in this document as voltage channels. These inputs are single-ended voltage inputs

with a maximum signal level of ±0.5 V with respect to VN for a specified operation. All inputs have

internal ESD protection circuitry; in addition, an overvoltage of ±6 V can be sustained on these inputs

without risk of permanent damage.

This logic input is used to select the method by which the three active energies from each phase are

summed. It selects between the arithmetical sum of the three energies (ABS logic high) or the sum of

the absolute values (ABS logic low). See the Mode Selection of the Sum of the Three Active Energies

section.

Select Calibration Frequency. This logic input is used to select the frequency on the calibration output

CF. Table 7 shows how the calibration frequencies are selected.

Rev. 0 | Page 7 of 28

Share Link: