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ADA4857-2YCPZ-R7 Ver la hoja de datos (PDF) - Analog Devices

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ADA4857-2YCPZ-R7 Datasheet PDF : 21 Pages
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ADA4857-1/ADA4857-2
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Exposed Paddle Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
Rating
11 V
See Figure 4
−VS + 0.7 V to +VS − 0.7 V
±VS
−VS
−65°C to +125°C
−40°C to +125°C
300°C
150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is specified
for device soldered in circuit board for surface-mount packages.
Table 4.
Package Type
8-Lead SOIC
8-Lead LFCSP
16-Lead LFCSP
θJA
θJC
Unit
115
15
°C/W
94.5
34.8
°C/W
68.2
19
°C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the ADA4857 is
limited by the associated rise in junction temperature (TJ) on
the die. At approximately 150°C, which is the glass transition
temperature, the properties of the plastic change. Even temporarily
exceeding this temperature limit may change the stresses that
the package exerts on the die, permanently shifting the parametric
performance of the ADA4857. Exceeding a junction temperature of
175°C for an extended period can result in changes in silicon
devices, potentially causing degradation or loss of functionality.
Data Sheet
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
die due to the ADA4857 drive at the output. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS).
PD = Quiescent Power + (Total Drive Power Load Power)
( ) PD =
VS × IS
+

VS
2
× VOUT
RL

VOUT
RL
2
RMS output voltages must be considered. If RL is referenced
to −VS, as in single-supply operation, the total drive power is
VS × IOUT. If the rms signal levels are indeterminate, consider the
worst case, when VOUT = VS/4 for RL to midsupply.
PD
=
(VS
×
IS
)+
(VS /4 )2
RL
In single-supply operation with RL referenced to −VS, the worst
case is VOUT = VS/2.
Airflow increases heat dissipation, effectively reducing θJA.
In addition, more metal directly in contact with the package
leads and exposed paddle from metal traces, through holes,
ground, and power planes reduces θJA.
Figure 4 shows the maximum power dissipation in the package
vs. the ambient temperature for the SOIC and LFCSP packages
on a JEDEC standard 4-layer board. θJA values are approximations.
3.0
2.5
2.0
ADA4857-2 (LFCSP)
1.5
1.0
ADA4857-1 (LFCSP)
0.5
ADA4857-1 (SOIC)
0
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
Rev. D | Page 6 of 21

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