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ADN2848ACP-32 Ver la hoja de datos (PDF) - Analog Devices

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ADN2848ACP-32 Datasheet PDF : 12 Pages
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ADN2848
Monitor Currents
IBMON, IMMON, and IMPDMON are current controlled
current sources from VCC. They mirror the bias, modulation,
and MPD current for increased monitoring functionality. An
external resistor to GND gives a voltage proportional to the
current monitored.
If the monitoring function IMPDMON is not required, the
IMPD pin must be grounded and the monitor photodiode
output must be connected directly to the PSET pin.
Data and Clock Inputs
Data and clock inputs are ac-coupled (10 nF capacitors recom-
mended) and terminated via a 100 internal resistor between
DATAP and DATAN and also between the CLKP and CLKN
pins. There is a high impedance circuit to set the common-
mode voltage, which is designed to allow for maximum input
voltage headroom over temperature. It is necessary that ac
coupling be used to eliminate the need for matching between
common-mode voltages.
DATAP
DATAN
ADN2848
(TO FLIP-FLOPS)
5050
VREG
R
R = 2.5k, DATA
R = 3k, CLK
400A TYP
Figure 3. AC Coupling of Data Inputs
For input signals that exceed 500 mV p-p single-ended, it is
necessary to insert an attenuation circuit as shown in Figure 4.
ADN2848
R1
DATAP/CLKP
R3
RIN
R2
DATAN/CLKN
NOTE THAT RIN = 100= THE DIFFERENTIAL
INPUT IMPEDANCE OF THE ADN2848
Figure 4. Attenuation Circuit
CCBIAS
When the laser is used in ac-coupled mode, the CCBIAS and
the IBIAS pins should be tied together (see Figure 7). In dc-
coupled mode, CCBIAS should be tied to VCC.
Automatic Laser Shutdown
The ADN2848 ALS allows compliance to ITU-T-G958 (11/94),
section 9.7. When ALS is logic high, both bias and modulation
currents are turned off. Correct operation of ALS can be con-
firmed by the FAIL alarm being raised when ALS is asserted.
Note that this is the only time that DEGRADE will be low
while FAIL is high.
Alarm Interfaces
The FAIL and DEGRADE outputs have an internal 30 kpull-
up resistor that is used to pull the digital high value to VCC.
However, the alarm output may be overdriven with an external
resistor allowing alarm interfacing to non-VCC levels. Non-VCC
alarm output levels must be below the VCC used for the
ADN2848.
Power Consumption
The ADN2848 die temperature must be kept below 125oC. The
LFCSP package has an exposed paddle. The exposed paddle
should be connected in such a manner that it is at the same
potential as the ADN2848 ground pins. The θJA for the package
is shown under the Absolute Maximum Ratings. Power con-
sumption can be calculated using
ICC = ICCMIN + 0.3 IMOD
P = VCC ϫ ICC + (IBIAS ϫ VBIAS_PIN) + IMOD (VMODP_PIN +
VMODN_PIN)/2
TDIE = TAMBIENT + θJA ϫ P
Thus, the maximum combination of IBIAS + IMOD must be calcu-
lated. Where:
ICCMIN = 50 mA, the typical value of ICC provided on Page 2
with IBIAS = IMOD = 0
TDIE = die temperature
TAMBIENT = ambient temperature
VBIAS_PIN = voltage at IBIAS pin
VMODP_PIN = average voltage at IMODP pin
VMODN_PIN = average voltage at IMODN pin
Laser Disode Interfacing
Many laser diodes designed for 1.25 Gbps operation are pack-
aged with an internal resistor to bring the effective impedance
up to 25 in order to minimize transmission line effects. In
high current applications, the voltage drop across this resistor,
combined with the laser diode forward voltage, makes direct
connection between the laser and the driver impractical in a 3 V
system. AC coupling the driver to the laser diode removes this
headroom constraint.
–6–
REV. 0

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