ISL6210 Ver la hoja de datos (PDF) - Renesas Electronics

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componentes Descripción

Fabricante

ISL6210

Dual Synchronous Rectified MOSFET Drivers

Renesas Electronics 

ISL6210

Package Outline Drawing

L16.4x4

16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE

Rev 6, 02/08

6

PIN 1

INDEX AREA

4.00

A

B

4X 1.95

12X 0.65

13

16

12

6

PIN #1 INDEX AREA

1

2 . 10 ± 0 . 15

(4X) 0.15

TOP VIEW

( 3 . 6 TYP )

( 2 . 10 )

9

16X

0 . 60

+0.15

-0.10

1.00 MAX

( 12X 0 . 65 )

4

8

BOTTOM VIEW

5

0.10 M C A B

4 0.28 +0.07 / -0.05

SIDE VIEW

SEE DETAIL "X"

0.10 C C

BASE PLANE

SEATING PLANE

0.08 C

( 16X 0 . 28 )

( 16 X 0 . 8 )

TYPICAL RECOMMENDED LAND PATTERN

C

0 . 2 REF

5

0 . 00 MIN.

0 . 05 MAX.

DETAIL "X"

NOTES:

1. Dimensions are in millimeters.

Dimensions in ( ) for Reference Only.

2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.

3. Unless otherwise specified, tolerance : Decimal ± 0.05

4. Dimension b applies to the metallized terminal and is measured

between 0.15mm and 0.30mm from the terminal tip.

5. Tiebar shown (if present) is a non-functional feature.

6. The configuration of the pin #1 identifier is optional, but must be

located within the zone indicated. The pin #1 identifier may be

either a mold or mark feature.

FN6392 Rev 1.00

December 9, 2008

Page 10 of 10

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