74HC164BQ Ver la hoja de datos (PDF) - Nexperia B.V. All rights reserved
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Fabricante
74HC164BQ Datasheet PDF : 17 Pages
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Nexperia
74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
Symbol Parameter
tsu
set-up time
th
hold time
fmax
maximum
frequency
CPD
power
dissipation
capacitance
Conditions
25 °C
Min Typ Max
DSA, and DSB to CP; see Fig. 9
VCC = 4.5 V
12 6
-
DSA, and DSB to CP; see Fig. 9
VCC = 4.5 V
+4 -2 -
for Cp, see Fig. 7
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
per package;
VI = GND to VCC - 1.5 V
27 55 -
- 61 -
[3] - 40 -
-40 °C to
+85 °C
Min Max
15
-
4
-
22
-
-
-
-
-
-40 °C to Unit
+125 °C
Min Max
18
- ns
4
- ns
18
- MHz
-
- MHz
-
- pF
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC 2 × fi × N + Σ (CL × VCC 2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ (CL × VCC 2 × fo) = sum of outputs.
10.1. Waveforms and test circuit
1/fmax
VI
CP input
VM
Fig. 7.
GND
tW
VOH
Qn output
VOL
tPHL
VY
tTHL
VM
VX
tPLH
tTLH
001aal392
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock pulse width, the output
transition times and the maximum clock frequency
74HC_HCT164
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 11 June 2020
© Nexperia B.V. 2020. All rights reserved
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