LH28F400SU-LC Ver la hoja de datos (PDF) - Sharp Electronics

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LH28F400SU-LC

4M (512K × 8, 256K × 16) Flash Memory

Sharp Electronics 

LH28F400SU-LC

4M (512K × 8, 256K × 16) Flash Memory

START

READ COMPATIBLE

STATUS REGISTER

CSR.7 = 0

1

WRITE FBH

WRITE DATA/A-1

WRITE

DATA/ADDRESS

READ COMPATIBLE

STATUS REGISTER

0

CSR.7 =

1

1 (NOTE)

CSR.4, 5 =

0

BUS

OPERATION

COMMAND

COMMENTS

Read

Q = CSRD

Toggle CE or OE

to update CSRD.

1 = WSM Ready

0 = WSM Busy

Write

Write

2-Byte

Write

D = FBH

A=X

D = WD

A-1 = 0 loads low byte

of Data Register.

A-1 = 1 loads high byte

of Data Register.

Other Addresses = X

Write

D = WD

A = WA

Internally, A-1 is automatically

complemented to load the

alternate byte location of the

Data Register.

Read

Q = CSRD

Toggle CE or OE

to update CSRD.

1 = WSM Ready

0 = WSM Busy

NOTE:

If CSR.4, 5 is set, as it is command sequence error,

should be cleared before further attempts are initiated.

CSR Full Status Check can be done after each 2-Byte Write,

or after a sequence of 2-Byte Writes.

Write FFH after the last operation to reset device to read

array mode.

See Command Bus Cycle notes for description of codes.

ANOTHER YES

2-BYTE

WRITE

NO

OPERATION COMPLETE

28F400SUH-LC15-10

Figure 12. Two-Byte Serial Writes with Compatible Status Registers (56-pin TSOP, 44-pin SOP)

16

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