ISL12023 Ver la hoja de datos (PDF) - Renesas Electronics

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ISL12023

Low Power RTC with Battery-Backed SRAM and Embedded Temp Compensation ±5ppm with Auto Daylight Saving

Renesas Electronics 

ISL12023

ALPHA Register (ALPHA)

TABLE 14. ALPHA REGISTER

ADDR 7

6

5

4

3

2

1

0

0Ch D ALPHA ALPHA ALPHA ALPHA ALPHA ALPHA ALPHA

6

5

4

3

2

1

0

The Alpha variable is 8 bits and is defined as the temperature

coefficient of Crystal from -40°C to T0, or the Alpha Cold (there is

an Alpha Hot register that must be programmed as well). It is

normally given in units of ppm/°C2, with a typical value of -

0.034. The ISL12023 device uses a scaled version of the

absolute value of this coefficient in order to get an integer value.

Therefore, Alpha<7:0> is defined as the (|Actual Alpha Value| x

2048) and converted to binary. For example, a crystal with Alpha

of

-0.034ppm/°C2 is first scaled (|2048*(-0.034)| = 70d) and then

converted to a binary number of 01000110b.

The practical range of Actual Alpha values is from

-0.020 to -0.060.

The ALPHA register should only be changed while the TSE (Temp

Sense Enable) bit is “0”. Note that both the ALPHA and the

ALPHA Hot registers need to be programmed with values for full

range temperature compensation.

BETA Register (BETA)

TABLE 15.

ADDR 7

6

5

4

3

2

1

0

0Dh TSE BTSE BTSR BETA4 BETA3 BETA2 BETA1 BETA0

TEMPERATURE SENSOR ENABLED BIT (TSE)

This bit enables the Temperature Sensing operation, including the

temperature sensor, A/D converter and AT/DT register adjustment.

The default mode after power-up is disabled (TSE = 0). To enable the

operation, TSE should be set to 1 (TSE = 1). When temperature

sense is disabled, the initial values for IATR and IDTR registers are

used for frequency control.

All changes to the IDTR, IATR, ALPHA and BETA registers must be

made with TSE = 0. After loading the new values, TSE can be

enabled and the new values are used. When TSE is set to 1, the

temperature conversion cycle begins and will end when two

temperature conversions are completed. The average of the two

conversions is in the TEMP registers.

TEMP SENSOR CONVERSION IN BATTERY MODE BIT

(BTSE)

This bit enables the Temperature Sensing and Correction in battery

mode. BTSE = 0 (default) no conversion, Temp Sensing or

Compensation in battery mode. BTSE = 1 indicates Temp Sensing

and Compensation enabled in battery mode. The BTSE is disabled

when the battery voltage is lower than 2.7V. No temperature

compensation will take place with VBAT<2.7V.

FREQUENCY OF TEMPERATURE SENSING AND

CORRECTION BIT (BTSR)

This bit controls the frequency of Temp Sensing and Correction.

BTSR = 0 default mode is every 10 minutes, BTSR = 1 is every

1.0 minute. Note that BTSE has to be enabled in both cases. See

Table 16.

TABLE 16. FREQUENCY OF TEMPERATURE SENSING AND

CORRECTION BIT

BTSE

BTSR

TC PERIOD IN

BATTERY MODE

0

0

OFF

0

1

OFF

1

0

10 Minutes

1

1

1 Minute

The temperature measurement conversion time is the same for

battery mode as for VDD mode, approximately 22ms. The battery

mode current will increase during this conversion time to

typically 68µA. The average increase in battery current is much

lower than this due to the small duty cycle of the ON-time versus

OFF-time for the conversion.

To figure the average increase in battery current, we take the

change in current times the duty cycle. For the 1 minute

temperature period the average current is shown in Equation 1:

IBAT = 0----.-6-0--0-2---s2----s-  68A= 250nA

(EQ. 1)

For the 10 minute temperature period the average current is

shown in Equation 2:

IBAT = 0---6-.--00---2-0--2-s---s-  68A= 25nA

(EQ. 2)

If the application has a stable temperature environment that

doesn’t change quickly, the 10 minute option will work well and

the backup battery lifetime impact is minimized. If quick

temperature variations are expected (multiple cycles of more

than 10° within an hour), then the 1 minute option should be

considered and the slightly higher battery current figured into

overall battery life.

GAIN FACTOR OF AT BIT (BETA<4:0>)

Beta is specified to take care of the Cm variations of the crystal.

Most crystals specify Cm around 2.2fF. For example, if Cm > 2.2fF,

the actual AT steps may reduce from 1ppm/step to approximately

0.80ppm/step. Beta is then used to adjust for this variation and

restore the step size to 1ppm/step.

BETA values are limited in the range from 01000 to 11111 as

shown in Table 17. To use Table 17, the device is tested at two AT

settings as follows:

BETA VALUES = (AT(max) - AT(min))/63, where:

AT(max) = FOUT in ppm (at AT = 00H) and

AT(min) = FOUT in ppm (at AT = 3FH).

The BETA VALUES result is indexed in the right hand column and

the resulting Beta factor (for the register) is in the same row in

the left column.

FN6682 Rev 3.00

December 6, 2011

Page 17 of 29

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