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DS2120B Ver la hoja de datos (PDF) - Maxim Integrated

Número de pieza
componentes Descripción
Fabricante
DS2120B
MaximIC
Maxim Integrated MaximIC
DS2120B Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
DS2120
During thermal shutdown, the termination pins are isolated from the SCSI bus and VREF becomes high
impedance. The DIFFSENS driver is shut down during either of these two events. The DIFF_CAP
receiver is disabled and the LVD goes low, indicating a non-LVD condition.
To ensure proper operation, the TPWR pin should be connected to the SCSI bus TERMPWR line. As
with all analog circuitry, the TERMPWR and VDD lines should be bypassed locally. A 2.2µF capacitor
and a 0.01µF high-frequency capacitor are recommended between TPWR and ground and placed as close
as possible to the DS2120. The DS2120 should be placed as close as possible to the SCSI connector to
minimize signal and power trace length, thereby lessening input capacitance and reflections that can
degrade the bus signals.
To maintain the specified regulation, a 4.7µF capacitor is required between the VREF pin and ground of
each DS2120. A high-frequency cap (0.1µF ceramic recommended) can also be placed on the VREF pin
in applications that use fast rise/fall-time drivers. A typical SCSI bus configuration is shown in Figure 2.
DIFFSENS Noise Filtering: The DS2120 incorporates a digital filter to remove high-frequency
transients on the DIFFSENS control line, thereby eliminating erroneous switching between modes. This
filter eliminates the need for the external capacitor and resistor, which previously performed this function.
The external filter can be used in addition to the digital filter if the DS2120 and DS2118M or DS2119M
are to be used interchangeably.
NOTES:
1) DIFFSENS: Refers to the SCSI bus signal.
2) DIFFSENSE: Refers to the Dallas Semiconductor pin name and internal circuitry relating to
differential sensing.
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