85408BGILF Ver la hoja de datos (PDF) - Integrated Device Technology

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85408BGILF

Low Skew, 1-to-8, Differential-to-LVDS Clock

Integrated Device Technology 

ICS85408I Datasheet

LOW SKEW, 1-TO-8, DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP

3.3V LVDS Driver Termination

A general LVDS interface is shown in Figure 3. In a 100Ω differential

transmission line environment, LVDS drivers require a matched load

termination of 100Ω across near the receiver input. For a multiple

LVDS outputs buffer, if only partial outputs are used, it is

recommended to terminate the unused outputs.

3.3V

50Ω

3.3V

LVDS Driver

+

R1

100Ω

–

50Ω

100Ω Differential Transmission Line

Figure 3. Typical LVDS Driver Termination

ICS85408BGI REVISION B JULY 2, 2009

11

©2009 Integrated Device Technology, Inc.

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