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ICS843252 Ver la hoja de datos (PDF) - Integrated Circuit Systems

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ICS843252 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS843252
FEMTOCLOCKS™CRYSTAL-TO-3.3V LVPECL
FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Νυμ βε ρ Ναμ ε
Τψπε
Δ ε σχριπτιον
1, 2
nQB, QB Output
Differential clock outputs. LVPECL interface levels.
3
VCCO_B
Power
Output supply pin for QB, nQB outputs.
4,
5
SELB1,
SELB0
Input
Pullup
Division select pins for Bank B. Default = High.
LVCMOS/LVTTL interface levels.
6
VCCO_A
Power
Output supply pin for QA output.
7, 8
QA, nQA Output
Differential clock outputs. LVPECL interface levels.
Feedback divide select. When Low (default), the feedback divider is set
9
FB_SEL Input Pulldown for ÷25. When HIGH, the feedback divider is set for ÷32.
LVCMOS/LVTTL interface levels.
10
VCCA
Power
Analog supply pin.
11
VCC
Power
Core supply pin.
12,
13
SELA0,
SELA1
Input
Pullup
Division select pins for Bank A. Default = HIGH.
LVCMOS/LVTTL interface levels.
14
15, 16
VEE
XTAL_OUT,
XTAL_IN
Power
Input
Negative supply pin.
Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
RPULLDOWN
R
PULLUP
Parameter
Input Capacitance
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
843252AG
www.icst.com/products/hiperclocks.html
2
REV. A NOVEMBER 9, 2005

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