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74AHC2G241-Q100 Ver la hoja de datos (PDF) - Nexperia B.V. All rights reserved

Número de pieza
componentes Descripción
Fabricante
74AHC2G241-Q100
NEXPERIA
Nexperia B.V. All rights reserved NEXPERIA
74AHC2G241-Q100 Datasheet PDF : 14 Pages
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Nexperia
74AHC2G241-Q100; 74AHCT2G241-Q100
Dual buffer/line driver; 3-state
11.1. Waveforms and test circuit
VI
nA input
VM
GND
VOH
tPHL
tPLH
nY output
VM
Fig. 4.
VOL
mna230
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
The input (nA) to output (nY) propagation delays
Fig. 5.
VI
1OE input
VM
GND
VCC
output
LOW-to-OFF
OFF-to-LOW
VOL
VOH
output
HIGH-to-OFF
OFF-to-HIGH
GND
tPLZ
tPZL
tPHZ
VOL + 0.3 V
VOH - 0.3 V
VM
tPZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
001aaa411
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
The input (1OE) to output 1Y enable and disable times
Fig. 6.
VI
2OE input
VM
GND
tPLZ
tPZL
VCC
output
LOW-to-OFF
OFF-to-LOW
VOL
VOH
output
HIGH-to-OFF
OFF-to-HIGH
GND
tPHZ
VOL + 0.3 V
VOH - 0.3 V
VM
tPZH
VM
outputs
enabled
outputs
disabled
outputs
enabled
001aaa410
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
The input (2OE) to output 2Y enable and disable times
74AHC_AHCT2G241_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 16 January 2019
© Nexperia B.V. 2019. All rights reserved
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