ML1350PP Ver la hoja de datos (PDF) - LANSDALE Semiconductor Inc.
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Fabricante
ML1350PP Datasheet PDF : 6 Pages
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ML1350
LANSDALE Semiconductor, Inc.
Legacy Applications Information
Figure 7. Power Gain and AGC Test Circuit
(455 kHz and 10.7 MHz)
Input
RS = 50Ω
L1
C2
C3
C1
4
3
21
C5
MC1350
VAGC *
5.1k 5
6 78
*Grounded for
maximum power gain.
C7 C6
12 V
C4
T1
Output
RS = 50Ω
Component
Frequency
455 kHz
10.7 MHz
C1
–
80–450 pF
C2
–
5.0–80 pF
C3
0.05 µF
0.001 µF
C4
0.05 µF
0.05 µF
C5
0.001 µF
36 pF
C8
0.05 µF
0.05 µF
C7
0.05 µF
0.05 µF
L1
–
4.6 µF
T1
Note 1
Note 2
NOTES: 1. Primary: 120 µH (center–tapped)
NOTES: 1. Qu = 140 at 455 kHz
NOTES: 1. Primary: Secondary turns ratio ≈ 13
NOTES: 2. Primary: 6.0 µH
NOTES: 2. Primary winding = 24 turns #36 AWG
NOTES: 2. (close–wound on 1/4" dia. form)
NOTES: 2. Core = Carbonyl E or J
NOTES: 2. Secondary winding = 1–1/2 turns #36 AWG, 1/4" dia.
NOTES: 2. (wound over center–tap)
Figure 8. Single–Ended Input Admittance
5.0
4.0
3.0
b11
2.0
1.0
0
10
g11
20
30 40 50
f, FREQUENCY (MHz)
70 100
Figure 10. Differential Output Admittance
1.0
(Single–ended output
admittance exhibits
0.8 twice these values.)
0.6
b22
0.4
0.2
0
10
g22
20
30 40 50
70
100
f, FREQUENCY (MHz)
Figure 9. Forward Transfer Admittance
500
< Y21 (–30 dB gain) 0
400
–40
< Y21 (max gain)
300
–80
200
–120
Y21
100
–160
0
–200
1.0 2.0 3.0 5.0 10
20
30 50 100
f, FREQUENCY (MHz)
Figure 11. Differential Output Voltage
8.0
7.0
6.0
V + + = 14 V
5.0
4.0
V + + = 12 V
3.0
2.0
1.0
0
0 10 20 30 40 50 60 70 80
GAIN REDUCTION (dB)
Page 4 of 6
www.lansdale.com
Issue A
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