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CM1231-02SO Ver la hoja de datos (PDF) - ON Semiconductor

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CM1231-02SO Datasheet PDF : 12 Pages
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CM1231-02SO
2, 4 and 8-Channel
Low-Capacitance ESD
Protection Array
Product Description
The CM123102SO is specifically designed for next generation
deep submicron ASIC protection. These devices are ideal for
protecting systems with high data and clock rates and for circuits
requiring low capacitive loading such as USB 2.0.
The CM123102SO incorporates dual stage ESD architecture
which offers dramatically higher system level ESD protection
compared with traditional single clamp designs. In addition, the
CM123102SO provides a controlled filter rolloff for even greater
spurious EMI suppression and signal integrity.
The CM123102SO protects against ESD pulses up to ±12 kV
contact on the “OUT” pins per the IEC 6100042 standard.
The device also features easily routed “passthrough” differential
pinouts in a 6lead SOT23 package.
Features
Two Channels of ESD Protection
Exceeds ESD Protection to IEC6100042 Level 4:
±12 kV Contact Discharge (OUT Pins)
TwoStage Matched Clamp Architecture
MatchingofSeries Resistor (R) of ±10 mW Typical
FlowThrough Routing for HighSpeed Signal Integrity
Differential Channel Input Capacitance Matching of 0.02 pF Typical
Improved Powered ASIC Latchup Protection
Dramatic Improvement in ESD Protection vs. Best in Class
SingleStage Diode Arrays
40% Reduction in Peak Clamping Voltage
40% Reduction in Peak Residual Current
Withstands over 1000 ESD Strikes*
Available in a SOT236 Package
These Devices are PbFree and are RoHS Compliant
Applications
USB Devices Data Port Protection
General HighSpeed Data Line ESD Protection
http://onsemi.com
SOT236
SO SUFFIX
CASE 527AJ
MARKING DIAGRAM
D312 MG
G
1
D312 = Specific Device Code
M
= Date Code
G
= PbFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping
CM123102SO SOT236 3000/Tape & Reel
(PbFree)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*Standard test condition is IEC6100042 level 4 test circuit with each (AOUT/BOUT) pin subjected to ±12 kV contact discharge for 1000 pulses.
Discharges are timed at 1 second intervals and all 1000 strikes are completed in one continuous test run.
© Semiconductor Components Industries, LLC, 2014
1
January, 2014 Rev. 4
Publication Order Number:
CM123102SO/D

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