CM1231-02SO(2011) Ver la hoja de datos (PDF) - ON Semiconductor

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CM1231-02SO
(Rev.:2011)

2, 4 and 8-Channel Low-Capacitance ESD Protection Array

ON Semiconductor 

CM1231−02SO

Table 3. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)

Symbol

Parameter

Conditions

VP

Operating Supply Voltage

ICC5

Operating Supply Current

VF

Diode Forward Voltage

Top Diode

Bottom Diode

VP = 5 V

IF = 8 mA, TA = 25°C

VESD

IRES

VCL

ESD Protection, Contact Discharge per IEC

61000−4−2 Standard

OUT−to−VN Contact

IN−to−VN Contact

Residual ESD Peak Current on RDUP

(Resistance of Device Under Protection)

Channel Clamp Voltage

Positive Transients

Negative Transients

TA = 25°C

IEC 61000−4−2 8 kV

RDUP = 5 W, TA = 25°C

IPP = 1 A, TA = 25°C, tP = 8/20 ms,

Zap at OUT, Measure at IN

RDYN

Dynamic Resistance

Positive Transients

Negative Transients

IPP = 1 A, TA = 25°C, tP = 8/20 ms,

Zap at OUT, Measure at IN

COUT

OUT Capacitance

f = 1 MHz, VP = 5.0 V, VIN = 2.5 V,

VOSC = 30 mV

(Note 2)

DCOUT Channel to Channel Capacitance Match

f = 1 MHz, VP = 5.0 V, VIN = 2.5 V,

VOSC = 30 mV

RS

Series Resistance

DRS

Channel to Channel Resistance Match

1. All parameters specified at TA = –40°C to +85°C unless otherwise noted.

2. Capacitance measured from OUT to VN with IN floating.

Min

0.60

0.60

±12

±4

Typ

5

0.80

0.80

2.3

+9

–1.4

0.4

0.3

1.5

0.02

1

±10

Max Units

5.5

V

1

mA

V

0.95

0.95

kV

A

V

W

pF

pF

W

±30 mW

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