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ZL30406QGG1 Ver la hoja de datos (PDF) - Zarlink Semiconductor Inc

Número de pieza
componentes Descripción
Fabricante
ZL30406QGG1
ZARLINK
Zarlink Semiconductor Inc ZARLINK
ZL30406QGG1 Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ZL30406
Data Sheet
GND
VCC1
VCC
OC-CLKoN
OC-CLKoP
GND
VCC2
LPF
GND
GND
BIAS
OC-CLKoEN
C77oEN-A
C77oEN-B
C77oEN-C
C77oEN-D
64 62 60 58 56 54 52 50
48
2
65 - EP_GND
46
4
44
6
42
8
ZL30406
40
10
38
12
36
14
34
16
18 20 22 24 26 28 30 32
GND
VCC
VDD
GND
VCC
GND
VDD
GND
NC
GND
GND
NC
GND
C19o
VDD
GND
Figure 2 - TQFP 64 pin (Top View)
Change Summary
The following table captures the changes from the February 2005 issue.
Page
1
Item
Change
Updated Ordering Information.
Pin Description
Pin Description Table
Pin #
1
2
3
4
5
Name
GND
VCC1
VCC
OC-CLKoN
OC-CLKoP
6
GND
7
VCC2
Description
Ground. 0 volt.
Positive Analog Power Supply. +3.3 V ±10%
Positive Analog Power Supply. +3.3 V ±10%
SONET/SDH Clock (CML Output). These outputs provide a programmable
differential CML clock at 19.44 MHz, 38.88 MHz, 77.76 MHz and 155.52 MHz.
The output frequency is selected with FS2 and FS1 pins.
Ground. 0 volt
Positive Analog Power Supply. +3.3 V ±10%
2
Zarlink Semiconductor Inc.

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