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Fabricante

CS2844LN8

Current Mode PWM Control Circuit with 50% Max Duty Cycle

ON Semiconductor 

CS2844, CS3844, CS2845, CS3845

ELECTRICAL CHARACTERISTICS (continued) (–25° ≤ TA ≤ 85° for CS2844/2845, 0° ≤ TA ≤ 70° for CS3844/CS3845.

VCC = 15 V*; RT = 10 kΩ, CT = 3.3 nF for sawtooth mode; unless otherwise stated.)

CS2842A/CS2843A CS3842A/CS3843A

Characteristic

Error Amp Section

Test Conditions

Min Typ Max Min Typ Max

Input Voltage

Input Bias Current

AVOL

Unity Gain Bandwidth

VCOMP = 2.5 V

VFB = 0

2.0 ≤ VOUT ≤ 4.0 V

Note 4.

2.45 2.50 2.55 2.42 2.50 2.58

– –0.3 –1.0 – –0.3 –2.0

65

90

–

65

90

–

0.7 1.0

–

0.7 1.0

–

PSRR

Output Sink Current

Output Source Current

VOUT High

VOUT Low

Current Sense Section

12 ≤ VCC ≤ 25 V

VFB = 2.7 V, VCOMP = 1.1 V

VFB = 2.3 V, VCOMP = 5.0 V

VFB = 2.3 V, RL = 15 kΩ to GND

VFB = 2.7 V, RL = 15 kΩ to VREF

60

70

–

60

70

–

2.0 6.0

–

2.0 6.0

–

–0.5 –0.8 – –0.5 –0.8 –

5.0 6.0

–

5.0 6.0

–

–

0.7 1.1

–

0.7 1.1

Gain

Notes 5 & 6.

2.85 3.00 3.15 2.85 3.00 3.15

Maximum Input Signal

PSRR

Input Bias Current

Delay to Output

Output Section

VCOMP = 5.0 V. Note 5.

12 ≤ VCC ≤ 25 V. Note 5.

VSENSE = 0

TJ = 25°C. Note 4.

0.9 1.0 1.1 0.9 1.0 1.1

–

70

–

–

70

–

–

–2.0 –10

–

–2.0 –10

–

150 300

–

150 300

Output Low Level

ISINK = 20 mA

ISINK = 200 mA

–

0.1 0.4

–

0.1 0.4

–

1.5 2.2

–

1.5 2.2

Output High Level

Rise Time

Fall Time

Total Standby Current

ISOURCE = 20 mA

ISOURCE = 200 mA

TJ = 25°C, CL = 1.0 nF. Note 4.

TJ = 25°C, CL = 1.0 nF. Note 4.

13 13.5 –

12 13.5 –

13 13.5 –

12 13.5 –

–

50 150

–

50 150

–

50 150

–

50 150

Startup Current

–

–

0.5 1.0

–

0.5 1.0

Operating Supply Current

VCC Zener Voltage

PWM Section

VFB = VSENSE = 0 V,

RT = 10 kΩ, CT = 3.3 nF

ICC = 25 mA

–

11

17

–

11

17

–

34

–

–

34

–

Maximum Duty Cycle

–

46

48

50

46

48

50

Minimum Duty Cycle

–

–

–

0

–

–

0

4. These parameters, although guaranteed, are not 100% tested in production.

5. Parameters measured at trip point of latch with VFB = 0.

6. Gain defined as: A = ∆VCOMP/∆VSENSE; 0 ≤ VSENSE ≤ 0.8 V.

*Adjust VCC above the start threshold before setting at 15 V.

Unit

V

µA

dB

MHz

dB

mA

mA

V

V

V/V

V

dB

µA

ns

V

V

V

V

ns

ns

mA

mA

V

%

%

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