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CMX808A

Family Radio CTCSS ‘Type 2’ Encoder and Decoder

CML Microcircuits 

Family Radio CTCSS 'Type 2' Encoder and Decoder

1.3 Signal List

CMX808A

Package

E3

P4

Signal

Pin No. Pin No.

Name

1

1

XTALN

2

2

XTAL/CLOCK

3

3

SERIAL CLOCK

4

4

COMMAND DATA

5

5

REPLY DATA

6

6

CSN

7

7

IRQN

Description

Type

O/P The inverted output of the on-chip oscillator.

I/P The input to the on-chip oscillator, for external

Xtal circuit or clock.

I/P The "C-BUS" serial clock input. This clock,

produced by the µController, is used for

transfer timing of commands and data to and

from the device. See "C-BUS" Timing Diagram

(Figure 4).

I/P The "C-BUS" serial data input from the

µController. Data is loaded into this device in

8-bit bytes, MSB (D7) first, and LSB (D0) last,

synchronised to the SERIAL CLOCK. See

"C-BUS" Timing Diagram (Figure 4).

O/P The "C-BUS" serial data output to the

µController. The transmission of REPLY DATA

bytes is synchronised to the SERIAL CLOCK

under the control of the CSN input. This 3-

state output is held at high impedance when

not sending data to the µController. See "C-

BUS" Timing Diagram (Figure 4).

I/P The "C-BUS" data loading control function: this

input is provided by the µController. Data

transfer sequences are initiated, completed or

aborted by the CSN signal. See "C-BUS"

Timing Diagram (Figure 4).

O/P This output indicates an interrupt condition to

the µController by going to a logic "0". This is a

"wire-ORable" output, enabling the connection

of up to 8 peripherals to 1 interrupt port on the

µController. This pin has a low impedance

pulldown to logic "0" when active and a high-

impedance when inactive. An external pullup

resistor is required.

An interrupt is effective if not masked out by

the IRQ MASK (bit 0 in the SUB-AUDIO

CONTROL register $80).

© 1999 Consumer Microcircuits Limited

4

D/808A/5

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