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ICS844256

FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

Integrated Device Technology 

ICS844256

FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER PRELIMINARY

APPLICATION INFORMATION

POWER SUPPLY FILTERING TECHNIQUES

As in any high speed analog circuitry, the power supply pins are

vulnerable to random noise. To achieve optimum jitter perfor-

mance, power supply isolation is required. The ICS844256 pro-

vides separate power supplies to isolate any high switching noise

from the outputs to the internal PLL. V , V , and V should

DD DDA

DDO

be individually connected to the power supply plane through vias,

and 0.01µF bypass capacitors should be used for each pin. Fig-

ure 1 illustrates this for a generic VCC pin and also shows that

VDDA requires that an additional10Ω resistor along with a 10µF

bypass capacitor be connected to the VDDA pin.

3.3V

VDD

.01μF 10Ω

VDDA

.01μF

10μF

FIGURE 1. POWER SUPPLY FILTERING

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

INPUTS:

LVCMOS CONTROL PINS

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1kΩ resistor can be used.

OUTPUTS:

LVDS Outputs

All unused LVDS output pairs can be either left floating or

terminated with 100Ω across. If they are left floating, we

recommend that there is no trace attached.

CRYSTAL INPUT INTERFACE

The ICS844256 has been characterized with 18pF parallel

resonant crystals. The capacitor values shown in Figure 2

below were determined using an 18pF parallel resonant

crystal and were chosen to minimize the ppm error.

X1

18pF Parallel Crystal

XTAL_IN

C1

18p

XTAL_OUT

C2

22p

FIGURE 2. CRYSTAL INPUt INTERFACE

IDT™ / ICS™ LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER 9

ICS844256BG REV. B NOVEMBER 19, 2007

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