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M34D64-W Ver la hoja de datos (PDF) - STMicroelectronics

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M34D64-W Datasheet PDF : 27 Pages
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Signal description
2
Signal description
M34D64-W
2.1
Serial Clock (SCL)
This input signal is used to strobe all data in and out of the device. In applications where this
signal is used by slave devices to synchronize the bus to a slower clock, the bus master
must have an open drain output, and a pull-up resistor must be connected from Serial Clock
(SCL) to VCC. (Figure 5 indicates how the value of the pull-up resistor can be calculated). In
most applications, though, this method of synchronization is not employed, and so the pull-
up resistor is not necessary, provided that the bus master has a push-pull (rather than open
drain) output.
2.2
Serial Data (SDA)
This bidirectional signal is used to transfer data in or out of the device. It is an open drain
output that may be wire-OR’ed with other open drain or open collector signals on the bus. A
pull up resistor must be connected from Serial Data (SDA) to VCC. (Figure 5 indicates how
the value of the pull-up resistor can be calculated).
2.3
Chip Enable (E0, E1, E2)
These input signals are used to set the value that is to be looked for on the three least
significant bits (b3, b2, b1) of the 7-bit device select code. These inputs must be tied to VCC
or VSS, to establish the device select code as shown in Figure 3. When not connected (left
floating), these inputs are read as low (0,0,0).
Figure 3. Device select code
VCC
VCC
M34xxx
Ei
VSS
M34xxx
Ei
VSS
Ai15122
2.4
Write Control (WC)
The hardware Write Control pin (WC) is useful for protecting the top quarter of the memory
(as shown in Figure 4.) from inadvertent write. The Write Control signal is used to enable
(WC = VIL) or disable (WC = VIH) write instructions to the top quarter of the memory area.
When unconnected, the WC input is internally read as VIL, and write operations are allowed.
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