74LVC541APW-Q100 Ver la hoja de datos (PDF) - NXP Semiconductors.
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componentes Descripción
Fabricante
74LVC541APW-Q100
NXP Semiconductors.
74LVC541APW-Q100 Datasheet PDF : 16 Pages
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Nexperia
74LVC541A-Q100
Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
VEXT
RL
RT
CL
RL
001aae331
Fig 7.
Test data is given in Table 8.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Test circuit for measuring switching times
Table 8. Test data
Supply voltage
1.2 V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
Input
VI
VCC
VCC
VCC
2.7 V
2.7 V
tr, tf
2 ns
2 ns
2 ns
2.5 ns
2.5 ns
Load
CL
30 pF
30 pF
30 pF
50 pF
50 pF
RL
1 k
1 k
500
500
500
VEXT
tPLH, tPHL
open
open
open
open
open
tPLZ, tPZL
2 VCC
2 VCC
2 VCC
2 VCC
2 VCC
tPHZ, tPZH
GND
GND
GND
GND
GND
74LVC541A_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 March 2013
© Nexperia B.V. 2017. All rights reserved
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