CXA1884N Ver la hoja de datos (PDF) - Sony Semiconductor
Número de pieza
componentes Descripción
Fabricante
CXA1884N Datasheet PDF : 16 Pages
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CXA1884N
Test Method
Input for –3dB Limiting VIN (LIM)
Use test circuit 3. Apply a signal with the following characteristics to SIG IN.
Signal frequency: fs = 21.7MHz
Modulation frequency: fMOD = 256Hz
Frequency deviation: fDIV = 2.3kHz Signal level: VL = 40dBµ
Here, the value of VAC is specified as VAC1. Next, the signal level VL is changed to 19dBµ and VAC value is
hence specified as VAC2.
20 log VAC1 < 3dB
VAC2
AM rejection ratio (AMRR)
Use test circuit 3. Apply a signal with the following characteristics to SIG IN.
Signal frequency: fs = 21.7MHz
Modulation frequency: fMOD = 256Hz
Frequency deviation: fDIV = 2.3kHz Signal level: VL = 40dBµ
Here, the value of VAC is specified as VAC1. Next, AM is modified to:
Modulation ratio: AMMOD = 30%
Modulation frequency: fMOD = 256Hz
and the VAC value is hence specified as VAC2.
AMRR = 20 log VAC1 > 25dB
VAC2
Recovered signal voltage VDET
Use test circuit 3. Apply a signal with the following characteristics to SIG IN.
Signal frequency: fs = 21.7MHz
Modulation frequency: fMOD = 256Hz
Frequency deviation: fDIV = 2.3kHz Signal level: VL = 50dBµ
Here, the value of the Pin 9 output voltage is expressed as VDET.
OP amplifier output voltage amplitude VO
Use test circuit 5. If output voltage V is expressed as V1 when VIN is 0.1V, and as V2 when VIN is 0.3V, it
follows that:
VO = V1 – V2
Comparator hysteresis width VTW
Use test circuit 6. Vary VIN between 0.1 to 0.3V.
Specify VIN voltage, as V1 when (C) voltage changes from low to high.
Similarly, specify VIN voltage as V2, when (C) voltage changes from high to low.
Therefore: VHY VTW = V1 – V2
LVA threshold voltage VPML and recovery voltage VPMH
Use test circuit 10. Vary power voltage Vcc from 1.3 to 0.95V.
Specify Vcc as VPML, when (C) voltage changes from low to high.
Similarly, specify Vcc as VPMH, when (C) voltage changes from high to low.
–8–
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