HV7224(2009) Ver la hoja de datos (PDF) - Supertex Inc
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HV7224 Datasheet PDF : 7 Pages
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HV7224
Function Table
Inputs
I/O Relations
CLK
DIR
S/R DATA
POL
OE
O/P HIGH
X
X
H
H
L
O/P OFF
X
X
L
X
L
O/P LOW
X
X
H
L
L
O/P OFF
X
X
X
X
H
Notes:
H = logic high level, L = logic low level, X = irrelevant
Data input (DRIO) loaded on the low-to-high transition of the clock.
Only one active output can be set at a time.
HV Outputs
H
HIGH-Z
L
All O/P HIGH-Z
Output Sequence Operation Table
DIR
SHIFT
Data Reset In
L
L
DRIOB
H
L
DRIOA
L
H
DRIOB
H
H
DRIOA
Notes:
* Reference to package outline or chip layout drawing.
1. DRIOA is DRIOB delayed by 40 clock pulses.
2. DRIOB is DRIOA delayed by 40 clock pulses.
Data Reset Out
DRIOA1
DRIOB2
DRIOA1
DRIOB2
HVOUT # Sequence
40 → 1
1 → 40
20 → 1 → 40 → 21
21 → 40 → 1 → 20
Direction*
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
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