MAX1232CWE Ver la hoja de datos (PDF) - Maxim Integrated
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MAX1232CWE Datasheet PDF : 8 Pages
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MAX1232
Microprocessor Monitor
AC Electrical Characteristics
(VCC = +5V ±10%, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
PBRST (Note 5)
PBRST Delay
Reset Active Time
ST Pulse Width
tPB
tPBD
tRST
tST
Figure 3
Figure 3
Figure 4
Figure 4, TD pin = 0V
ST Timeout Period
VCC Fall Time (Note 4)
VCC Rise Time (Note 4)
VCC Detect to RST High and
RST Low
tTD
tF
tB
tBPD
TD pin = open
TD pin = VCC
Figure 5
Figure 6
Figure 7, VCC falling
VCC Detect to RST Low and RST
Open (Note 6)
tBPU
Figure 8, VCC rising
Note 1: PBRST is internally pulled up to VCC with an internal impedance of typically 40kΩ.
Note 2: Measured with outputs open.
Note 3: All voltages referenced to GND.
Note 4: Guaranteed by design.
Note 5: PBRST must be held low for a minimum of 20ms to guarantee a reset.
Note 6: tR = 5μs.
MIN TYP MAX UNITS
20
ms
1
4
20
ms
250
610 1000
ms
75
ns
62.5
150
250
250
600 1000
ms
500 1200 2000
10
µs
0
µs
100
ns
250
610 1000
ms
Pin Description
PIN
WIDE SO
DIP/SO
1, 3, 5, 7, 10,
12, 14, 16
—
2
1
4
2
6
3
8
4
9
5
11
6
13
7
15
8
NAME
FUNCTION
N.C. No Connection
PBRST
TD
TOL
GND
RST
RST
ST
VCC
Pushbutton Reset Input. A debounced active-low input that ignores pulses less than 1ms
in duration and is guaranteed to recognize inputs of 20ms or greater.
Time Delay Set. The watchdog timebase select input (tTD = 150ms for TD = 0V,
tTD = 600ms for TD = open, tTD = 1.2s for TD = VCC).
Tolerance Input. Connect to GND for 5% tolerance or to VCC for 10% tolerance.
Ground
Reset Output (Active High). Goes active:
(1) If VCC falls below the selected reset voltage threshold.
(2) If PBRST is forced low.
(3) If ST is not strobed within the minimum timeout period.
(4) During power-up.
Reset Output (Active Low, Open Drain). See RST.
Strobe Input. Input for watchdog timer.
+5V Power-Supply Input
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