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IFX1050GVIO Ver la hoja de datos (PDF) - Infineon Technologies

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Fabricante
IFX1050GVIO
Infineon
Infineon Technologies Infineon
IFX1050GVIO Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2
Pin Configuration
IFX1050GVIO
Pin Configuration
TxD
GND
VCC
RxD
IFX 1050GVIO
(PG-DSO-8)
1
8
2
7
3
6
4
5
INH
CANH
CANL
V33V
Figure 1 Pin Configuration IFX1050GVIO (top view)
Table 1 Pin Definitions and Functions IFX1050GVIO
Pin No. Symbol Function
1
TxD
CAN transmit data input; 20 kΩ pull-up, LOW in dominant state
2
GND
Ground
3
VCC
5 V Supply input
4
RxD
CAN receive data output; LOW in dominant state,
integrated pull-up
5
V33V
Logic supply input; 3.3V or 5V microcontroller logic supply can be connected here! The
digital I/Os of the IFX1050GVIO adopt to the connected microcontroller logic supply a V33V
6
CANL Low line I/O; LOW in dominant state
7
CANH High line I/O; HIGH in dominant state
8
INH
Inhibit Input; control input, 20 kΩ pull, set LOW for normal mode
Data Sheet
4
Rev. 1.0, 2011-04-08

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