GS820E32AT-150 Ver la hoja de datos (PDF) - Giga Semiconductor

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componentes Descripción

Fabricante

GS820E32AT-150

64K x 32 2M Synchronous Burst SRAM

Giga Semiconductor 

GS820E32AT/Q-150/138/133/117/100/66

Pipelined DCD Read Cycle Timing

CK

ADSP

ADSC

ADV

A0-An

GW

BW

Single Read

Burst Read

tKL

tS tH

tKH

tKC ADSP is blocked by E1 inactive

tS tH

ADSC initiated read

tS tH

Suspend Burst

tS tH

RD1

tS

RD2

RD3

tH

tS

tH

BA - BD

E1

E2

E3

G

DQA-DQD

tS tH

tS tH

tS tH

E1 masks ADSP

E2 and E3 only sampled with ADSP or ADSC

tOE

tOHZ

tKQX

tOLZ

Hi-Z

Q1a

Q2A Q2B

Q2C

tLZ

tKQ

Deselected with E2

tKQX

Q2D

Q3A

tHZ

Rev: 1.04 3/2000

17/23

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

© 2000, Giga Semiconductor, Inc.

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