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GTL2003 Ver la hoja de datos (PDF) - NXP Semiconductors.

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GTL2003
NXP
NXP Semiconductors. NXP
GTL2003 Datasheet PDF : 24 Pages
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NXP Semiconductors
GTL2003
8-bit bidirectional low voltage translator
8. Application design-in information
8.1 Bidirectional translation
For the bidirectional clamping configuration, higher voltage to lower voltage or lower
voltage to higher voltage, the GREF input must be connected to DREF and both pins
pulled to HIGH side VDD1 through a pull-up resistor (typically 200 k). A filter capacitor on
DREF is recommended. The processor output can be totem pole or open-drain (pull-up
resistors may be required) and the chip set output can be totem pole or open-drain
(pull-up resistors are required to pull the Dn outputs to VDD1). However, if either output is
totem pole, data must be unidirectional or the outputs must be 3-stateable and the outputs
must be controlled by some direction control mechanism to prevent HIGH-to-LOW
contentions in either direction. If both outputs are open-drain, no direction control is
needed. The opposite side of the reference transistor (SREF) is connected to the
processor core power supply voltage. When DREF is connected through a 200 k
resistor to a 3.3 V to 5.5 V VDD1 supply and SREF can be set between 0.8 V to
(VDD1 1.5 V), without the need for pull-up resistors on the low voltage side. The output of
each Sn will have a maximum output voltage equal to SREF and the output of each Dn
has a maximum output voltage equal to VDD1. It is recommended that VDD1 be greater
than 1.5 V for proper operation.
1.8 V
1.5 V
1.2 V
1.0 V
0.8 V
VCORE
CPU I/O
200 kΩ
GTL2002
GND
SREF
S1
S2
GREF
DREF
D1
D2
5V
totem pole or
open-drain I/O
VDD1
CHIPSET I/O
increase bit size
by using 8-bit GTL2003,
10-bit GTL2010,
or 22-bit GTL2000
S3
D3
S4
D4
S5
D5
Sn
Dn
3.3 V
VDD2
CHIPSET I/O
002aac642
Fig 4.
Typical bidirectional voltage translation.
Bidirectional translation to multiple higher voltage levels such as an I2C-bus
application
GTL2003
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 3 July 2012
© NXP B.V. 2012. All rights reserved.
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