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NM27LV010B Ver la hoja de datos (PDF) - Fairchild Semiconductor

Número de pieza
componentes Descripción
Fabricante
NM27LV010B
Fairchild
Fairchild Semiconductor Fairchild
NM27LV010B Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Functional Description (Continued)
ERASURE CHARACTERISTICS
The erasure characteristics of the device are such that erasure
begins to occur when exposed to light with wavelengths shorter
than approximately 4000 Angstroms (Å). It should be noted that
sunlight and certain types of fluorescent lamps have wavelengths
in the 3000Å – 4000Å range.
The recommended erasure procedure for the EPROM is expo-
sure to short wave ultraviolet light which has a wavelength of
2537Å. The integrated dose (i.e., UV intensity x exposure time) for
erasure should be a minimum of 30 Wsec/cm2.
The EPROM should be placed within one inch of the lamp tubes
during erasure. Some lamps have a filter on their tubes which
should be removed before erasure.
An erasure system should be calibrated periodically. The distance
from lamp to device should be maintained at one inch. The erasure
time increases at the square of the distance from the lamp (if
distance is doubled the erasure time increases by factor of four).
Lamps lose intensity as they age. When a lamp is changed, the
distance has changed or the lamp has aged, the system should be
checked to make certain full erasure is occurring. Incomplete
erasure will cause symptoms that can be misleading. Program-
mers, components, and even system designs have been errone-
ously suspected when incomplete erasure was the problem.
SYSTEM CONSIDERATION
The power switching characteristics of EPROMs require careful
decoupling of the devices. The supply current, ICC, has three
segments that are of interest to the system designer: the standby
current level, the active current level and the transient current
peaks that are produced by voltage transitions on input pins. The
magnitude of these transient current peaks is dependent on the
output capacitance loading of the device. The associated VCC
transient voltage peaks can be suppressed by properly selected
decoupling capacitors. It is recommended that at least a 0.1 µF
ceramic capacitor be used on every device between VCC and
GND. This should be a high frequency capacitor of low inherent
inductance. In addition, at least a 4.7 µF bulk electrolytic capacitor
should be used between VCC and GND for each eight devices. The
bulk capacitor should be located near where the power supply is
connected to the array. The purpose of the bulk capacitor is to
overcome the voltage drop caused by the inductive effects of the
PC board traces.
Mode Selection
The modes of operation of the NM27LV010B are listed below. All inputs are TTL levels except for VPP and A9 for device signature.
Modes Selection
Mode
Read
Output Disable
Standby
Programming
Program Verify
Program Inhibit
Pins
CE
VIL
X
VIH
VIL
VIL
VIH
OE
PGM
VPP
VCC
Outputs
VIL
X
VCC
3.3V
DOUT
VIH
X
VCC
3.3V
High Z
X
X
VCC
3.3V
High Z
VIH
VIL
12.75V
6.25V
DIN
VIL
VIH
12.75V
12.75V
DOUT
VIH
X
12.75V
6.25V
High Z
X can be VIL or VIH
Manufacturer’s Identification Code
Pins
A0 A9 O7 O6 O5 O4 O3 O2 O1 O0 Hex
(12) (26) (21) (20) (19) (18) (17) (15) (14) (13) Data
Manufacturer Code VIL
12V
1
0
0
0
1
1
1
1
8F
Device Code
VIH
12V
1
0
0
0
0
1
1
0
86
8
www.fairchildsemi.com

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