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NM27LV010BVXXX

1,048,576-Bit (128k x 8) Low Voltage EPROM

Fairchild Semiconductor 

Functional Description (Continued)

ERASURE CHARACTERISTICS

The erasure characteristics of the device are such that era-

sure begins to occur when exposed to light with wavelengths

shorter than approximately 4000 Angstroms (Ar). It should be

noted that sunlight and certain types of fluorescent lamps

have wavelengths in the 3000Ar –4000Ar range.

The recommended erasure procedure for the EPROM is ex-

posure to short wave ultraviolet light which has a wavelength

of 2537Ar. The integrated dose (i.e., UV intensity x exposure

time) for erasure should be a minimum of 30 Wsec/cm2.

The EPROM should be placed within one inch of the lamp

tubes during erasure. Some lamps have a filter on their

tubes which should be removed before erasure.

An erasure system should be calibrated periodically. The dis-

tance from lamp to device should be maintained at one inch.

The erasure time increases at the square of the distance

from the lamp (if distance is doubled the erasure time in-

creases by factor of four). Lamps lose intensity as they age.

When a lamp is changed, the distance has changed or the

lamp has aged, the system should be checked to make cer-

tain full erasure is occurring. Incomplete erasure will cause

symptoms that can be misleading. Programmers, compo-

nents, and even system designs have been erroneously sus-

pected when incomplete erasure was the problem.

SYSTEM CONSIDERATION

The power switching characteristics of EPROMs require

careful decoupling of the devices. The supply current, ICC,

has three segments that are of interest to the system de-

signer: the standby current level, the active current level and

the transient current peaks that are produced by voltage

transitions on input pins. The magnitude of these transient

current peaks is dependent on the output capacitance load-

ing of the device. The associated VCC transient voltage

peaks can be suppressed by properly selected decoupling

capacitors. It is recommended that at least a 0.1 µF ceramic

capacitor be used on every device between VCC and GND.

This should be a high frequency capacitor of low inherent in-

ductance. In addition, at least a 4.7 µF bulk electrolytic ca-

pacitor should be used between V CC and GND for each

eight devices. The bulk capacitor should be located near

where the power supply is connected to the array. The pur-

pose of the bulk capacitor is to overcome the voltage drop

caused by the inductive effects of the PC board traces.

Mode Selection

The modes of operation of the NM27LV010B are listed in Table 1. All inputs are TTL levels except for VPP and A9 for device sig-

nature.

Mode

Read

Output Disable

Standby

Programming

Program Verify

Program Inhibit

X can be VIL or VIH

Pins

Pins

A0

(12)

Manufacturer Code

VIL

Device Code

VIH

TABLE 1. Modes Selection

CE

OE

PGM

VPP

VIL

VIL

X

VCC

X

VIH

X

VCC

VIH

X

X

VCC

VIL

VIH

VIL

12.75V

VIL

VIL

VIH

12.75V

VIH

VIH

X

12.75V

TABLE 2. Manufacturer’s Identification Code

A9

O7

O6

O5

O4

O3

(26)

(21)

(20)

(19)

(18)

(17)

12V

1

0

0

0

1

12V

1

0

0

0

0

VCC

3.3V

3.3V

3.3V

6.25V

12.75V

6.25V

O2

O1

(15)

(14)

1

1

1

1

Outputs

DOUT

High Z

High Z

DIN

DOUT

High Z

O0

Hex

(13) Data

1

8F

0

86

Book

Extract

End

www.fairchildsemi.com

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PrintDate=1997/08/06 PrintTime=13:37:51 5610 ds012333 Rev. No. 3 cmserv Proof

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