74LVC27 Ver la hoja de datos (PDF) - NXP Semiconductors.
Número de pieza
componentes Descripción
Fabricante
74LVC27 Datasheet PDF : 14 Pages
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NXP Semiconductors
4. Functional diagram
74LVC27
Triple 3-input NOR gate
1 1A
2 1B
13 1C
3 2A
4 2B
5 2C
9 3A
10 3B
11 3C
1Y 12
2Y 6
3Y 8
mna936
Fig 1. Logic symbol
1
≥1
2
12
13
3
≥1
4
6
5
9
≥1
10
8
11
mna935
Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
A
B
Y
C
mna937
Fig 3. Logic diagram (one gate)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 VCC
13 1C
12 1Y
27
11 3C
10 3B
9 3A
8 3Y
001aad091
Fig 4. Pin configuration for SO14 and (T)SSOP14
terminal 1
index area
1B 2
2A 3
2B 4
2C 5
2Y 6
27
GND(1)
13 1C
12 1Y
11 3C
10 3B
9 3A
001aad092
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration for DHVQFN14
74LVC27
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 27 October 2011
© NXP B.V. 2011. All rights reserved.
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