CXD2548 Ver la hoja de datos (PDF) - Sony Semiconductor

Número de pieza

componentes Descripción

Fabricante

CXD2548

CD Digital Signal Processor with Built-in Digital Servo and DAC

Sony Semiconductor 

CXD2548R

Pin

No.

Symbol

110 AVDD2

111 AVss2

112 Vss0

I/O

Description

R ch, analog power supply.

R ch, analog GND.

Digital GND.

Notes) • PCMD is a MSB first, two's complement output.

• GTOP is used to monitor the frame sync protection status. (High: sync protection window released.)

• XUGF is the frame sync obtained from the EFM signal, and negative pulse. It is the signal before

sync protection.

• XPLCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the

EFM signal transition point coincide.

• The GFS signal goes high when the frame sync and the insertion timing match.

• RFCK is derived from the crystal accuracy, and has a cycle of 136µs (during normal speed).

• C2PO represents the data error status.

• XRAOF is generated when the 16K RAM exceeds the ±4F jitter margin.

–7–

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