CXD2548 Ver la hoja de datos (PDF) - Sony Semiconductor
Número de pieza
componentes Descripción
Fabricante
CXD2548 Datasheet PDF : 113 Pages
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CXD2548R
Pin Description
Pin
No.
Symbol
1 SYSM
2 RMUT1
3 LMUT2
4 CKOUT
5 VDD0
6 SBSO
7 EXCK
8 SQCK
9 SQSO
10 SENS
11 SCLK
12 DATA
13 XLAT
14 CLOK
15 XRST
16 ACDT
17 PWMI
18 XLON
19 SPOA
20 WFCK
21 GTOP
22 XUGF
23 XPCK
24 GFS
25 RFCK
26 C2PO
27 XROF
28 SCOR
29 MNT0
30 MNT1
31 MNT3
32 Vss1
33 DOUT
34 ATSK
35 MIRR
36 DFCT
I/O
I
O 1, 0
O 1, 0
O 1, 0
O 1, 0
I
I
O 1, 0
O 1, 0
I
I
I
I
I
O 1, 0
I
O 1, 0
I
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
O 1, 0
I
O 1, 0
O 1, 0
Description
System mute input. (high = on, low = off)
R ch zero detection output. (high = on, low = off)
L ch zero detection output. (high = on, low = off)
DAC master clock frequency division output. Either the clock input from
XTAI × 1, × 1/2 or × 1/4, or low output is selected and output.
Digital power supply.
Sub P to W serial output.
SBSO readout clock input.
SQSO readout clock input.
Sub Q 80-bit and PCM peak and level data 16-bit output.
SENS output to CPU.
SENS serial data readout clock input.
Serial data input from CPU.
Latch input from CPU. Serial data is latched at the falling edge.
Serial data transfer clock input from CPU.
System reset. Reset when low.
Normally not used. Leave open.
Spindle motor external control input.
Microcomputer extension interface (output).
Microcomputer extension interface (input A).
WFCK (Write Flame Clock) output.
GTOP output.
XUGF output.
XPLCK output.
GFS output.
RFCK output.
C2PO output.
XRAOF output.
Outputs a high signal when either subcode sync S0 or S1 is detected.
MNT0 output.
MNT1 output.
MNT3 output.
Digital GND.
Digital Out output pin.
Anti-shock pin.
Mirror signal output.
Defect signal output.
–4–
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