M34C02-RDW6 Ver la hoja de datos (PDF) - STMicroelectronics

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Fabricante

M34C02-RDW6

2 Kbit serial I²C bus EEPROM for DIMM serial presence detect

STMicroelectronics 

Signal description

2

Signal description

M34C02-R

2.1

Serial Clock (SCL)

This input signal is used to strobe all data in and out of the device. In applications where this

signal is used by slave devices to synchronize the bus to a slower clock, the bus master

must have an open drain output, and a pull-up resistor can be connected from Serial Clock

(SCL) to VCC. (Figure 4 indicates how the value of the pull-up resistor can be calculated). In

most applications, though, this method of synchronization is not employed, and so the pull-

up resistor is not necessary, provided that the bus master has a push-pull (rather than open

drain) output.

t(s) 2.2

Serial Data (SDA)

c This bidirectional signal is used to transfer data in or out of the device. It is an open drain

du output that may be wire-OR’ed with other open drain or open collector signals on the bus. A

ro ) pull up resistor must be connected from Serial Data (SDA) to VCC. (Figure 4 indicates how

P t(s the value of the pull-up resistor can be calculated).

lete duc 2.3

Chip Enable (E0, E1, E2)

so ro These input signals are used to set the value that is to be looked for on the three least

b P significant bits (b3, b2, b1) of the 7-bit device select code. These inputs must be tied to VCC

- O te or VSS to establish the device select code.

t(s) ole Figure 3. Chip Enable input connection

c bs VCC

VCC

Produ t(s) - O M34C02-R

te c Ei

M34C02-R

Ei

sole rodu VSS

VSS

Ai12819b

Ob olete P 2.4

Write Control (WC)

bs This input signal is provided for protecting the contents of the whole memory from

O inadvertent write operations. Write Control (WC) is used to enable (when driven low) or

disable (when driven high) write instructions to the entire memory area or to the Protection

Register.

When Write Control (WC) is tied low or left unconnected, the write protection of the first half

of the memory is determined by the status of the Protection Register.

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