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MAX5544CSA

Low-Cost, +5V, Serial-Input, Voltage-Output, 14-Bit DAC

Maxim Integrated 

Low-Cost, +5V, Serial-Input,

Voltage-Output, 14-Bit DAC

The external buffer amplifier’s gain-bandwidth product

is important because it increases the settling time by

adding another time constant to the output response.

The effective time constant of two cascaded systems,

each with a single time-constant response, is approxi-

mately the root square sum of the two time constants.

The DAC output’s time constant is 1µs / 10.4 = 96ns,

ignoring the effect of additional capacitance. If the time

constant of an external amplifier with 1MHz bandwidth

is 1 / 2π (1MHz) = 159ns, then the effective time con-

stant of the combined system is:

( ) ( ) 

2

2

 96ns + 159ns  = 186ns





This suggests that the settling time to within 1/2LSB of

the final output voltage, including the external buffer

amplifier, will be approximately 10.4 • 186ns = 1.93µs.

Digital Inputs and Interface Logic

The digital interface for the 14-bit DAC is based on a 3-

wire standard that is SPI/QSPI/MICROWIRE compati-

ble. The three digital inputs (CS, DIN, and SCLK) load

the digital input data serially into the DAC.

All of the digital inputs include Schmitt-trigger buffers to

accept slow-transition interfaces. This means that opto-

couplers can interface directly to the MAX5544 without

additional external logic. The digital inputs are TTL/

CMOS-logic compatible.

Unipolar Configuration

Figure 3 shows the MAX5544 configured for unipolar

operation with an external op amp. The op amp is set for

unity gain, and Table 1 shows the codes for this circuit.

Table 1. Unipolar Code Table

DAC LATCH CONTENTS

MSB

LSB

ANALOG OUTPUT, VOUT

1111 1111 1111 11(00)

1000 0000 0000 00(00)

0000 0000 0000 01(00)

0000 0000 0000 00(00)

VREF • (16,383 / 16,384)

VREF • (8192 / 16,384) = 1/2VREF

VREF • (1 / 16,834)

0V

Power-Supply Bypassing and

Ground Management

For optimum system performance, use PC boards with

separate analog and digital ground planes. Wire-wrap

boards are not recommended. Connect the two ground

planes together at the low-impedance power-supply

source. Connect DGND and AGND together at the IC.

The best ground connection can be achieved by con-

necting the DAC’s DGND and AGND pins together and

connecting that point to the system analog ground

plane. If the DAC’s DGND is connected to the system

digital ground, digital noise may get through to the

DAC’s analog portion.

Bypass VDD with a 0.1µF ceramic capacitor connected

between VDD and AGND. Mount it with short leads

close to the device. Ferrite beads can also be used to

further isolate the analog and digital power supplies.

Chip Information

TRANSISTOR COUNT: 2209

SUBSTRATE CONNECTED TO DGND

MC68XXXX

PCS0

MOSI

SCLK

+5V

0.1µF

CS

DIN

SCLK

VDD

DGND

+2.5V

10µF

0.1µF

REF

MAX5544

AGND

MAX495

UNIPOLAR

OUT

OUT

EXTERNAL OP AMP

Figure 3. Typical Operating Circuit

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 1999 Maxim Integrated Products

Printed USA

is a registered trademark of Maxim Integrated Products.

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