CAT25C32SI-TE13 Ver la hoja de datos (PDF) - Catalyst Semiconductor => Onsemi

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CAT25C32SI-TE13

32K/64K-Bit SPI Serial CMOS EEPROM

Catalyst Semiconductor => Onsemi 

CAT25C32/64

FUNCTIONAL DESCRIPTION

The CAT25C32/64 supports the SPI bus data

transmission protocol. The synchronous Serial Peripheral

Interface (SPI) helps the CAT25C32/64 to interface

directly with many of today’s popular microcontrollers.

The CAT25C32/64 contains an 8-bit instruction register.

(The instruction set and the operation codes are detailed

in the instruction set table)

After the device is selected with CS going low, the first

byte will be received. The part is accessed via the SI pin,

with data being clocked in on the rising edge of SCK.

The first byte contains one of the six op-codes that define

the operation to be performed.

PIN DESCRIPTION

SI: Serial Input

SI is the serial data input pin. This pin is used to input all

opcodes, byte addresses, and data to be written to the

25C32/64. Input data is latched on the rising edge of the

serial clock.

SO: Serial Output

SO is the serial data output pin. This pin is used to

transfer data out of the 25C32/64. During a read cycle,

data is shifted out on the falling edge of the serial clock.

SCK: Serial Clock

SCK is the serial clock pin. This pin is used to synchronize

Figure 1. Sychronous Data Timing

VIH

tCS

CS

SCK

SI

VIL

tCSS

VIH

VIL

VIH

VIL

tWH

tSU

tH

VALID IN

VOH

SO

VOL

HI-Z

Note: Dashed Line= mode (1, 1) — — — —

INSTRUCTION SET

tCSH

tWL

tRI

tFI

tV

tHO

tDIS

HI-Z

Instruction

Opcode

Operation

WREN

0000 0110

Enable Write Operations

WRDI

0000 0100

Disable Write Operations

RDSR

0000 0101

Read Status Register

WRSR

0000 0001

Write Status Register

READ

0000 0011

Read Data from Memory

WRITE

0000 0010

Write Data to Memory

Power-Up Timing(1)(2)

Symbol

tPUR

tPUW

Parameter

Power-up to Read Operation

Power-up to Write Operation

Max.

1

1

Units

ms

ms

Note:

(1) This parameter is tested initially and after a design or process change that affects the parameter.

(2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.

Doc. No. 1001, Rev. G

4

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