MSM6665-XX Ver la hoja de datos (PDF) - Oki Electric Industry

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MSM6665-XX

DOT MATRIX LCD CONTROLLER WITH 17-DOT COMMON DRIVER AND 80-DOT SEGMENT DRIVER

Oki Electric Industry 

¡ Semiconductor

MSM6665-xx

I/O Procedure

• Input timing (command input, display data input)

8-bit input synchronization is taken by this leading edge.

If input in an 8-bit unit is kept, the following leading edges of CS is not needed.

CS

C/ D

don't care

C/D

SI

SHT

"Z"

SO

MSB

LSB

BUSY

NON-BUSY/ BUSY

17D : Max=[Master clock cycle] x 10

9D : Max=[Master clock cycle] x 20

• Output timing (display code data output)

Code data or arbitrator data indicated by the address pointer is always output, provided

that the SOE command has already been input.

CS

Synchronization in an 8-bit unit.

C/ D

don't care

SHT

"Z"

SO

MSB

NON-BUSY/ BUSY

LSB

BUSY

NON-BUSY

17D : Max=[Master clock cycle] x 10

9D : Max=[Master clock cycle] x 20

Note) If CS is set at "L" level when 8-bit read-out is not complete, and CS is set at "H" level again, then

read-out operation is executed, uncomplete data will be output continually and the remaining

read-out data will be zero.

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