KF836U
TEST CIRCUIT
REFERENCE LEVEL TEST CIRCUIT
ZI
Rs
R
SSG
0dBm
ZO
R
RS, RL : 50ή (Internal Impedance of Source and Load)
R : 0ή
ZI(ZO)=RS(RL)+R
DET
RL
MEASUREMENT CIRCUIT
Rs
SSG
ZI
R
3
4
2
5
1
6
ZO
R
RL
DET
2 : INPUT 1 , 3 , 4 , 6 : GROUND 5 : OUTPUT
RS, RL : 50ή (Internal Impedance of Source and Load)
R : 0ή
ZI(ZO)=RS(RL)+R
2001. 11. 16
Revision No : 2
2/5